Level conversion circuit, integrated circuit chip and electronic device

Abstract

The invention provides a level conversion circuit, an integrated circuit chip and an electronic device. The level conversion circuit comprises an inverter unit, a first NMOS transistor and a second NMOS transistor, the inverter unit comprises a power input end used for receiving a first voltage; a signal input end used for receiving a pulse signal having a logic high level equal to the first voltage; an inverted output end; the drain of the first NMOS transistor is for receiving a second voltage, and the gate is connected with an in-phase output end; the gate of the second NMOS transistor is connected with the inverted output end, and the source is grounded; and a voltage difference between the first voltage and the logic low level in the pulse signal is greater than a threshold voltage ofthe PMOS transistor in the inverter unit, and the difference between the first voltage and the second voltage is greater than the threshold voltage of the first NMOS transistor. Compared with the prior art, no matter how low the second voltage is, the MOS transistors in the level conversion circuit provided by the invention can be rapidly turned on, and the circuit can work normally and effectively.

Description

technical field [0001] The present application relates to the technical field of integrated circuits, in particular to a level conversion circuit, an integrated circuit chip and electronic equipment. Background technique [0002] In a modern integrated circuit system, in order to obtain a high-speed working state, its core logic unit is usually designed to work at a low voltage, such as 0.9V, 0.7V or 0.6V, and its input unit is usually designed at a high voltage based on stability considerations work with, for example, 3.3V, 2.5V, or 1.8V. In this way, due to the difference in operating voltage, a level conversion circuit needs to be designed between the input unit and the core logic unit. [0003] The existing level conversion circuit usually includes two CMOS inverters connected in series in sequence, and the source of the PMOS transistor in each CMOS inverter is used to receive the above-mentioned low voltage. In addition, in order to enable the first CMOS inverter to w...

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Problems solved by technology

[0005] In view of this, the application provides a level conversion circuit, an integrated circuit chip and electronic equipment to solve the problem that the PMOS tube cannot conduct current when the source voltage of the PMOS tube in the CMOS inverter is low in the existing level conversion circuit. The problem that the circuit is prone to failure

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