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Low resistance and leakage device

A device and electro-coupler technology, applied in the field of low-resistance and low-leakage semiconductor devices

Active Publication Date: 2018-05-25
NEXPERIA BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Both HEMTs and diodes have an on-resistance (R on ) significantly higher than the on-resistance problem under DC conditions

Method used

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  • Low resistance and leakage device
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Examples

Experimental program
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Embodiment Construction

[0030] Many well-known manufacturing steps, components, and connectors have been omitted or have not been described in detail in order not to obscure the disclosure.

[0031]Gallium Nitride (GaN) based high electron mobility transistors suffer from dynamic on-resistance (R on ) or current collapse, where the current collapse is mainly attributed to (contributed to) surface trapping and bulk (epi buffer) trapping. Surface trapping is usually minimized by some dielectric passivation scheme, while bulk trapping is associated with leakage paths in the GaN epitaxial layer (epi). The conductivity and leakage paths of the epitaxial layer can alter the bulk trapping such that increasing the leakage path in the epitaxial layer results in reduced trapping, ie low current collapse. The inventive concept proposes to selectively switch the conductivity of the epitaxial layer by ion implantation and provide leakage paths through metal-filled trenches in order to realize low current collaps...

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Abstract

A heterojunction semiconductor device is disclosed. The heterojunction semiconductor device includes a substrate and a multilayer structure disposed on the substrate. The multilayer structure includesa first layer comprising a first semiconductor disposed on top of the substrate, and a second layer comprising a second semiconductor disposed on top of the first layer to define an interface betweenthe first layer and the second layer. The second semiconductor is different from the first semiconductor such that a Two-Dimensional Electron Gas forms adjacent to the interface. The device also includes a first terminal electrically coupled to a first area of the interface between the first layer and second layer and a second terminal electrically coupled to a second area of the interface between the first layer and second layer. The device also includes an electrically conducting channel comprising an implanted region at bottom and sidewalls. The electrically conducting channel is filled with a metal and the electrically conducting channel connects the second terminal and a region of the first layer such that electric charge can flow between the second terminal and the first layer.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a low-resistance and low-leakage semiconductor device. Background technique [0002] In recent years, high mobility based III-nitrides (gallium nitride (GaN) or aluminum gallium nitride (AlGaN), etc.) High-efficiency transistors (HEMTs) and Schottky diodes have received a lot of attention. Both HEMTs and diodes have an on-resistance (R on ) is significantly higher than the on-resistance problem under DC conditions. Contents of the invention [0003] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. [0004] In one embodiment, a heterojunction semiconductor device is disclosed. The heteroju...

Claims

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Application Information

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IPC IPC(8): H01L29/06H01L29/10H01L29/778
CPCH01L29/0638H01L29/1029H01L29/7781H01L29/7786H01L29/41766H01L29/872H01L29/2003H01L29/475H01L29/7787
Inventor 所罗伯·潘迪简·雄斯基
Owner NEXPERIA BV