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Re-distribution layer structure and manufacturing method thereof

A technology for reconfiguring the circuit layer and circuit structure, which is applied in the direction of circuits, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of wire reduction, easy dumping, peeling, etc., and achieve the effect of increasing the attachment area and the best structural stability

Active Publication Date: 2018-05-29
CHIPMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, narrow wires reduce the area of ​​the insulating layer attached to the substrate below or attached to the substrate, which is easy to fall and cause peeling.

Method used

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  • Re-distribution layer structure and manufacturing method thereof
  • Re-distribution layer structure and manufacturing method thereof
  • Re-distribution layer structure and manufacturing method thereof

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Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0049] Figure 1A is a partial cross-sectional schematic diagram of a reconfiguration circuit structure according to an embodiment of the present invention. Please see first Figure 1A , the reconfiguration circuit structure 100 of this embodiment is suitable for disposing on the substrate 10 to reconfigure the pads 12 of the substrate 10 to other positions. In this embodiment, the substrate 10 may be a circuit board, a chip or a wafer, and the type of the substrate 10 is not limited to the above. Such as Figure 1AAs shown, the substrate 10 has a pad 12 and a protection layer 14 , wherein the protection layer 14 has a first opening 16 , and the first opening 16 exposes a portion of the pad 12 .

[0050] The reconfiguration wiring structure 100 includes a first patterned insulating layer 110 , a reconfiguration wiring layer 130 and a second patterned insulating layer 150 . The first patterned insulating layer 110 is disposed on the passivation layer 14 and includes a second o...

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PUM

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Abstract

The invention provides a re-distribution layer structure and a manufacturing method thereof. The re-distribution layer structure is adapted to be disposed on a substrate having a pad and a protectivelayer which has a first opening exposing a part of the pad. The re-distribution layer structure includes a first and a second patterned insulating layers and a re-distribution layer. The first patterned insulating layer is disposed on the protective layer and includes at least one trench and a second opening corresponding to the first opening. The re-distribution layer is disposed on the first patterned insulating layer and includes a pad portion and a wire portion. The pad portion is located on the first patterned insulating layer. The wire portion includes a body and at least one root protruding from the body and extending into the trench. The body extends from the pad portion to the first and the second openings and is connected to the pad. The second patterned insulating layer covers the wire portion and exposes a part of the pad portion. The re-distribution layer structure is difficult to be peeled and has a favorable structure stability.

Description

technical field [0001] The invention relates to a circuit structure and a manufacturing method thereof, and in particular to a reconfiguration circuit structure and a manufacturing method thereof. Background technique [0002] In today's highly informationized society, the market for multimedia applications continues to expand rapidly. Integrated circuit packaging technology also needs to cooperate with the digitalization, networking, regional connection and user-friendly development of electronic devices. In order to meet the above requirements, it is necessary to strengthen the requirements of high-speed processing, multi-function, accumulation, small size, light weight and low price of electronic components, so the integrated circuit packaging technology is also moving towards miniaturization and high density. develop. The so-called integrated circuit packaging density refers to the degree of the number of pins contained in a unit area. For high-density integrated circ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/488H01L21/60
CPCH01L24/03H01L24/05H01L24/11H01L24/13H01L2224/0235H01L2224/02331H01L2224/03H01L2224/0231H01L2224/02351H01L23/3157H01L23/525H01L2224/02375H01L2224/05582H01L2224/05644H01L2224/05023H01L2224/02311H01L2224/05024H01L23/528H01L23/5283H01L23/53238H01L2224/05155H01L2224/0401H01L2924/00014H01L23/49838H01L24/06H01L2224/02206H01L2224/02317H01L2224/0233H01L2224/04042H01L2224/05027H01L2224/4805
Inventor 胡恩崧
Owner CHIPMOS TECH INC