Feature function-based on-chip metal interconnected network electro-migration reliability analysis method

Abstract

The invention discloses a feature function-based on-chip metal interconnected network electro-migration reliability analysis method. The method comprises the following steps of: dividing interconnected networks in a chip into same-layer metals to form an interconnected tree; extracting parameters on the interconnected tree; taking the interconnected tree as a basic unit of electro-migration; and modeling the electro-migration on the interconnected tree by using a Korhonen equation. According to the method, a feature function-based method is adopted to correctly and efficiently solve the Korhonen equation on the interconnected tree. On the basis of solving a transient stress, a bisection method is adopted to solve an electro-migration failure time.

Description

technical field [0001] The invention belongs to the field of integrated circuit aided design, and in particular relates to a method for analyzing the reliability of electromigration of on-chip metal interconnection nets based on characteristic functions. Background technique [0002] As the manufacturing process of integrated circuits develops to the nanometer level, the complexity of chips increases day by day, which makes it more and more difficult to ensure the reliability of integrated circuits. Among the reliability problems faced by integrated circuits, chip failure caused by electromigration (EM) on metal interconnection lines on chips has become one of the key factors restricting the reliability of integrated circuits. The electromigration on the metal interconnection line of the chip is caused by the collision of the electrons with the metal atoms in the wire when they flow, and the momentum is transferred to the metal atoms to cause the migration of the atoms. The ...

AI Technical Summary

Problems solved by technology

However, the traditional electromigration analysis algorithm based on Black's empirical formula has the following disadvantages: 1) The traditional electromigration analysis method adopts a serial failure model, that is, it is believed that the electromigration failure of any metal wire will cause the failure of the power supply network, while the modern chip The power supply network often adopts a grid structure with high redundancy, which makes the traditional electromigration verification analysis algorithm too pessimistic for the analysis of electromigration reliability of the power supply network.

However, the use of steady-state stress estimation will lead to large errors in the determination of the location and time of electromigration void nucleation on the interconnection network.

Images