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A gate drive circuit, method and device

A gate drive and circuit technology, applied in logic circuits, logic circuits using specific components, logic circuits using semiconductor devices, etc., can solve the problems of high power consumption of gate drive circuits and transistor damage, etc., to ensure alternate conduction, Reduce the possibility of damage, the effect of reducing the voltage range

Active Publication Date: 2021-06-11
DATANG NXP SEMICON CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The invention provides a gate drive circuit, method and device to solve the problems of possible damage to the transistor caused by a wide range of power supply voltage and excessive power consumption of the gate drive circuit

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  • A gate drive circuit, method and device
  • A gate drive circuit, method and device
  • A gate drive circuit, method and device

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Embodiment Construction

[0056] Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the drawings, it should be understood that the invention may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.

[0057] refer to figure 1 , shows a gate drive circuit in an embodiment of the present invention. In the present invention, the gate drive circuit includes the following modules: non-overlapping signal generator (Nov SG) 01, high-side level conversion circuit (HS LS) 02, low-side level conversion circuit (LS LS) 03 , High-side ground generator (Vssh Gen) 04, low-side power generator (Vddl Gen) 05, bias current generator (IBias Gen) 06, BH buffe...

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Abstract

The invention provides a gate driving circuit. Wherein, the gate drive circuit includes: a non-overlapping signal generator, a high-side level conversion circuit, a low-side level conversion circuit, a high-side ground generator, a low-side power generator, a bias current generator, and a BH buffer device and BL buffer. The non-overlapping signal generator converts the input level signal into a pair of non-simultaneously high level signals, and respectively passes a pair of non-simultaneously high level signals through a high-side level conversion circuit and a low-side level conversion After the circuit performs level conversion, the level-converted signal is output to the BH buffer and BL buffer, so that the BH buffer and BL buffer can provide a voltage signal of 2 to 3V to the MP extension drain high-voltage transistor and the MN extension Drain high-voltage transistor to control the turn-on and turn-off of the transistor. In the present invention, by reducing the voltage range provided to the transistor, the power consumption of the gate drive circuit is reduced, and the possibility of damage to the transistor is also reduced.

Description

technical field [0001] The present invention relates to the field of circuit technology, in particular to a gate drive circuit, method and device. Background technique [0002] When driving a high-power transistor, a gate drive circuit is used to control the opening and closing of the high-power transistor outside the gate drive circuit through the gate drive circuit. In a traditional gate drive circuit, it usually consists of a high-voltage circuit and a low-voltage circuit. The high-voltage circuit is integrated with multiple ordinary MOS transistors. The low-voltage circuit provides digital signals to the high-voltage circuit, and the control of high-power transistors can be realized through digital signals. When driving a high-power transistor, a digital signal is input from the low-voltage circuit, and the digital signal is output to each ordinary MOS transistor in the high-voltage circuit through a single line of the inverter, so that the output signal realizes the con...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/08
CPCH03K19/0813
Inventor 张文翩张开友
Owner DATANG NXP SEMICON CO LTD