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Semiconductor device and manufacturing method thereof

A semiconductor and device technology, applied in the field of semiconductor devices and their manufacturing processes, can solve problems such as increasing contact resistance

Active Publication Date: 2021-05-25
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As the size of the FinFET shrinks, the electrode contact area on the S / D shrinks, increasing the contact resistance

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

Examples

Experimental program
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Embodiment Construction

[0023] It should be appreciated that the following disclosure provides many different embodiments or examples for implementing different features of the invention. Specific embodiments or examples of elements and arrangements are described below to simplify the present disclosure. These are of course examples only and are not intended to be limiting. For example, the dimensions of the elements are not limited to the disclosed ranges or values, but may depend on process conditions and / or desired properties of the device. In addition, in the following description, forming a first component over or on a second component may include an embodiment in which the first component and the second component are formed in direct contact, and may also include an embodiment in which a first component may be formed between the first component and the second component. Additional components such that the first and second components may not be in direct contact. Various features may be arbitr...

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Abstract

A semiconductor device includes a gate structure formed over a channel region of the semiconductor device, a source / drain region adjacent to the channel region, and a conductive contact layer over the source / drain region. The source / drain region includes a first epitaxial layer having a first material composition and a second epitaxial layer formed over the first epitaxial layer. The second epitaxial layer has a second material composition different from the first material composition. A conductive contact layer is in contact with the first epitaxial layer and the second epitaxial layer. The bottom of the conductive contact layer is located below the uppermost portion of the first epitaxial layer. Embodiments of the present invention relate to a semiconductor device and a manufacturing method thereof.

Description

technical field [0001] Embodiments of the present invention relate to a semiconductor integrated circuit, and more particularly, to a semiconductor device with an epitaxial source / drain (S / D) structure with gaps and a manufacturing process thereof. Background technique [0002] As the semiconductor industry has moved into nanotechnology process nodes in pursuit of higher device density, higher performance, and lower cost, challenges from manufacturing and design issues have led to multi-gate fields such as FinFETs (FinFETs) Development of three-dimensional designs for effect transistors (FETs). In a FinFET, the gate electrode is adjacent to three sides of the channel region, with a gate dielectric layer interposed between the gate electrode and the channel region. As FinFETs shrink in size, the electrode contact area on the S / D shrinks, increasing contact resistance. As transistor dimensions continue to shrink, further improvements to FinFETs are required. Contents of th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L21/336H01L29/06
CPCH01L29/0684H01L29/66742H01L29/7855H01L29/0673H01L29/665H01L29/7848H01L29/0653H01L29/0847H01L29/161H01L29/165H01L21/76897H01L21/76805H01L21/823431H01L21/823821H01L29/41791H01L29/785H01L29/66795H01L29/408H01L29/4236H01L29/0649H01L21/76829H01L29/6656
Inventor 李昆穆陈两仪萧文助
Owner TAIWAN SEMICON MFG CO LTD