Demodulation circuit applied to GFSK receiver and building method thereof

Abstract

The invention provides a demodulation circuit applied to a GFSK receiver. The circuit comprises an interpolation filter used for processing a phase signal to acquire a signal with a double symbol rate; a timed error detector used for acquiring timed error information according to a signal input by the interpolation filter; and a loop filter used for processing the timed error information and inputting the processed timed error information into an interpolation controller, wherein the interpolation controller controls the interpolation filter to perform interpolation on a baseband signal, and finally a sampling clock of an interpolator is converged on a symbol clock, so that symbol synchronization of a sending terminal and a receiving terminal is achieved. According to the circuit providedby the invention, the functions of symbol synchronization, carrier frequency offset compensation and symbol judgment can be synchronously completely, and the characteristics of simple structure and good performance are achieved.

Description

technical field [0001] The invention relates to the field of GFSK receivers, in particular to a demodulation circuit and construction method applied to GFSK receivers. Background technique [0002] Signals received by wireless digital receivers often have symbol timing deviations during communication. Therefore, it is necessary to restore the best sampling point through a symbol synchronization circuit. The all-digital receiver adopts a fixed sampling frequency, the sampling clock and the symbol clock are independent of each other, and the timing error obtained by the timing synchronization circuit is used to control the interpolation filter to output the best sampling point of the symbol. [0003] Generally speaking, the synchronous circuit is composed of four parts including an interpolation filter (Interpolator), a timing error detector (CTimingErrorDetector), a loop filter (LPF) and a numerically controlled oscillator (NC0). [0004] After the sampling signal is interp...

AI Technical Summary

Problems solved by technology

Among them, the sooner or later gate algorithm works at 3 times the symbol rate, so the hardware overhead is large; the Gardner algorithm works at 2 times the symbol rate, and it can work normally in the presence of carrier frequency offset, but the structure is more complicated

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