Demodulation circuit applied to GFSK receiver and building method thereof

A technology of demodulation circuit and construction method, which is applied in the direction of frequency modulation carrier system, etc., can solve the problems of large hardware overhead and complex structure, and achieve the effect of good performance and simple structure

Inactive Publication Date: 2018-07-20
上海富芮坤微电子有限公司
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  • Abstract
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Problems solved by technology

Among them, the sooner or later gate algorithm works at 3 times the symbol rate, so the hardware overhead is large; the Gardner algorithm w

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  • Demodulation circuit applied to GFSK receiver and building method thereof
  • Demodulation circuit applied to GFSK receiver and building method thereof

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Embodiment Construction

[0027] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.

[0028] In order to thoroughly understand the present invention, detailed steps and detailed structures will be provided in the following description, so as to illustrate the technical solution of the present invention. Preferred embodiments of the present invention are described in detail below, however, the present invention may have other embodiments besides these detailed descriptions.

[0029] refer to figure 1 , figure 2 As shown, the present invention provides a demodulation circuit applied to a GFSK receiver, including an interpolation filter, the int...

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Abstract

The invention provides a demodulation circuit applied to a GFSK receiver. The circuit comprises an interpolation filter used for processing a phase signal to acquire a signal with a double symbol rate; a timed error detector used for acquiring timed error information according to a signal input by the interpolation filter; and a loop filter used for processing the timed error information and inputting the processed timed error information into an interpolation controller, wherein the interpolation controller controls the interpolation filter to perform interpolation on a baseband signal, and finally a sampling clock of an interpolator is converged on a symbol clock, so that symbol synchronization of a sending terminal and a receiving terminal is achieved. According to the circuit providedby the invention, the functions of symbol synchronization, carrier frequency offset compensation and symbol judgment can be synchronously completely, and the characteristics of simple structure and good performance are achieved.

Description

technical field [0001] The invention relates to the field of GFSK receivers, in particular to a demodulation circuit and construction method applied to GFSK receivers. Background technique [0002] Signals received by wireless digital receivers often have symbol timing deviations during communication. Therefore, it is necessary to restore the best sampling point through a symbol synchronization circuit. The all-digital receiver adopts a fixed sampling frequency, the sampling clock and the symbol clock are independent of each other, and the timing error obtained by the timing synchronization circuit is used to control the interpolation filter to output the best sampling point of the symbol. [0003] Generally speaking, the synchronous circuit is composed of four parts including an interpolation filter (Interpolator), a timing error detector (CTimingErrorDetector), a loop filter (LPF) and a numerically controlled oscillator (NC0). [0004] After the sampling signal is interp...

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Application Information

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IPC IPC(8): H04L27/14
CPCH04L27/14
Inventor 陆敏贵
Owner 上海富芮坤微电子有限公司
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