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Data processing circuit of digital television and data processing method thereof

A technology for data processing and digital TV, applied in digital transmission systems, electrical components, and error prevention. Effect

Inactive Publication Date: 2018-08-21
MEDIATEK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Because the multiplexing processing unit 120 and the bit deinterleaving unit 130 use different memories, memory waste is caused
Furthermore, the multiplexing processing unit 120 and the bit deinterleaving unit 130 perform multiple reads and writes to the memory in their respective processing programs, which affects the overall performance of the circuit.

Method used

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  • Data processing circuit of digital television and data processing method thereof
  • Data processing circuit of digital television and data processing method thereof
  • Data processing circuit of digital television and data processing method thereof

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Embodiment Construction

[0037] The disclosed content of the present invention includes a digital TV data processing circuit and a data processing method, which can improve the performance of the digital TV and save hardware resources. The data processing circuit and data processing method can be applied to the receiving end of digital television. On the premise that the implementation is possible, those skilled in the art can select equivalent components or steps according to the disclosure content of this specification to realize the present invention. That is, the implementation of the present invention is not limited to the embodiments described later.

[0038] image 3 It is a part circuit of the digital TV receiver of the present invention. The data processing circuit 200 simultaneously performs multiplexing processing and bit deinterleaving processing on the input data. According to the different processing methods of the memory address by the write operation and the read operation, the data ...

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PUM

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Abstract

The invention discloses a data processing circuit and a data processing method thereof. The data processing method is applied to a multiplexing process and a bit de-interleaving process of the digitaltelevision. A de-mapping circuit of the digital television generates multiple orthogonal frequency division multiplexing symbols. The data processing method includes: storing a target OFDM symbol ofOFDM symbols; generating a write address for each data bit of the target OFDM symbol according a sequence number of target OFDM symbol; generating a read address for each data bit of the target OFDM symbol according to a counter value; and writing each data bit of the target OFDM symbol into a memory according to the write addresses, and reading each data bit of the target OFDM symbol from the memory according to the read addresses. Each data bit of the target symbol is subjected to one write operation and one read operation. The target OFDM symbol read from the memory has completely undergonethe multiplexing process and the bit de-interleaving process.

Description

technical field [0001] The present invention relates to digital television, in particular to multiplexing and bit de-interleaving of digital television. Background technique [0002] figure 1 It is part of the circuit of the receiving end of the existing second-generation terrestrial digital video broadcasting (digital video broadcasting second-generation terrestrial, DVB-T2) or second-generation cable digital video broadcasting (digital video broadcasting second-generation cable, DVB-C2). De-mapping (de-mapping) circuit 110 uses an orthogonal frequency division multiplexing (orthogonal frequency division multiplexing, OFDM) symbol symbol q Data bits converted to numbers b 0,q , b 1,q ,...,b ηmod-1,q , q is the number of the OFDM symbol, and an OFDM symbol symbol q It includes ηmod bits. For example, ηmod of 256QAM (quadrature amplitude modulation, quadrature amplitude modulation) is equal to 8, ηmod of 64QAM is equal to 6, and so on. [0003] The multiplexing processi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L1/00H04N21/2381H04N21/236H04N21/438H04N21/4385
CPCH04L1/0041H04L1/0071H04N21/236H04N21/2381H04N21/4381H04N21/4385H04N21/4435H04N21/2315H04N21/4382H04N21/6112H04N21/6118H04N21/42615H04N21/433
Inventor 王俊杰
Owner MEDIATEK INC
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