Unlock instant, AI-driven research and patent intelligence for your innovation.

Read operation processing method and device of nand flash memory and nand storage device

A technology of a storage device and a processing method, applied in the field of memory, capable of solving problems affecting the accuracy of read operations and large fluctuations in word line voltage, achieving the effects of improving accuracy and reducing voltage fluctuations on the word line

Active Publication Date: 2022-02-11
GIGADEVICE SEMICON (BEIJING) INC
View PDF8 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Embodiments of the present invention provide a read operation processing method and device for NAND flash memory, and a NAND storage device to solve the problem in the prior art that the accuracy of the read operation is affected by the large fluctuation of the word line voltage during the read operation

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Read operation processing method and device of nand flash memory and nand storage device
  • Read operation processing method and device of nand flash memory and nand storage device
  • Read operation processing method and device of nand flash memory and nand storage device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0028] figure 2 It is a flow chart of the read operation processing method of the NAND flash memory in Embodiment 1 of the present invention. This embodiment is applicable to the situation of the read operation processing of the NAND flash memory, and is applied to a NAND storage device. The NAND storage device includes a plurality of word lines and A plurality of NAND memory cells, each word line is respectively connected to the corresponding memory cell. The method can be executed by a device having the function of processing a read operation of a NAND flash memory, and the device can be implemented in software and / or hardware, such as firmware in a NAND storage device. The method provided by Embodiment 1 of the present invention specifically includes:

[0029] S110. Determine a memory cell to be read.

[0030] In the NAND flash memory chip, the memory cells are arranged in an array, and each column contains multiple memory cells. The control gate of each memory cell is c...

Embodiment 2

[0039] image 3 It is a schematic structural diagram of a data block processing device for NAND flash memory in Embodiment 2 of the present invention. The device is applied to a NAND storage device, and the storage device includes a plurality of word lines and a plurality of NAND memory cells, and each word line is respectively associated with a corresponding The memory unit connection, the device specifically includes:

[0040] Determining module 10, for determining the memory cell to be read;

[0041] The first voltage applying module 11 is configured to apply a first voltage to two word lines adjacent to the word line corresponding to the memory cell to be read, wherein the first voltage is a voltage filtered by a filter;

[0042] The second voltage applying module 12 is configured to apply a second voltage to the word line corresponding to the memory cell to be read, wherein the first voltage is greater than the second voltage.

[0043] Further, the filter is an RC filte...

Embodiment 3

[0046] Figure 4 It is a schematic structural diagram of a NAND storage device in Embodiment 3 of the present invention. As shown in the figure, the storage device 4 includes: a plurality of memory units 40, a plurality of word lines 41 connected to corresponding memory units, a filter 42, Voltage source 43 and firmware 44 .

[0047] Wherein, the voltage source 43 is connected with each word line 41, and is used for providing the voltage corresponding to each word line 41 corresponding to the memory cell 40 during the read operation, for example, providing the second voltage for the selected memory cell n to be read. Voltage, realize read operation, for example, this second voltage is Vn voltage, in one example, this voltage is 0.5V, belongs to low voltage; For except two adjacent memory cells n+1 of memory cell n to be read Memory cells other than memory cell n-1 are provided with a Vm voltage, eg, 5V or 6V. The voltage source 43 may be a charge pump in the memory device ch...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The embodiment of the invention discloses a read operation processing method and device of a NAND flash memory and a NAND storage device. Wherein, the method is applied to a NAND storage device, the storage device includes a plurality of word lines and a plurality of NAND memory cells, and each word line is connected to a corresponding memory cell, and the method includes: determining the memory to be read unit; adding a first voltage to two word lines adjacent to the word line corresponding to the memory cell to be read, wherein the first voltage is a voltage filtered by a filter; being the memory cell to be read The word line corresponding to the cell is supplied with a second voltage, wherein the first voltage is greater than the second voltage. In the embodiment of the present invention, by adding the voltage filtered by the filter to the two word lines adjacent to the word line corresponding to the memory cell to be read, the fluctuation of the voltage on the two adjacent word lines is reduced by the filter , so as to reduce the fluctuation of the voltage on the word line corresponding to the memory cell to be read, so as to improve the accuracy of the read operation.

Description

technical field [0001] Embodiments of the present invention relate to memory technologies, and in particular to a method and device for processing a read operation of a NAND flash memory and a NAND storage device. Background technique [0002] NAND flash is a kind of Flash memory, which belongs to non-volatile semiconductor memory. NAND flash includes many data blocks, and each data block is composed of many memory cells for reading and writing data. [0003] As is well known, a semiconductor memory has a large number of memory cells arranged in an array, and a specific memory cell in the array is usually selected through a word-line (WL) and a pair of bit-lines (bit-line, BL). Word lines are typically coupled to one or more control gates of each memory cell within a row. Since the turn-on characteristic of the control gate is similar to that of NMOS, when the word line coupled thereto has a high voltage (ie, is activated), all the memory cells are turned on. A bit line p...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/26G11C16/30
CPCG11C16/26G11C16/30
Inventor 张现聚苏志强李建新
Owner GIGADEVICE SEMICON (BEIJING) INC