High dynamic image compression system based on FPGA

A high-dynamic image and compression system technology, applied in the field of image processing, can solve the problems of low parallelism, low real-time performance, and high power consumption in the calculation process, and achieve high storage space requirements, poor portability, and poor real-time performance. Effect

A high-dynamic image and compression system technology, applied in the field of image processing, can solve the problems of low parallelism, low real-time performance, and high power consumption in the calculation process, and achieve high storage space requirements, poor portability, and poor real-time performance. Effect

CN108540808AActive Publication Date: 2018-09-14XIDIAN UNIV

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  • High dynamic image compression system based on FPGA
  • High dynamic image compression system based on FPGA
  • High dynamic image compression system based on FPGA

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Embodiment Construction

[0030] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0031] The invention is a hardware system for accelerating a high dynamic image compression algorithm with maximum image entropy, and is realized by FPGA.

[0032] refer to figure 1 , the high dynamic image compression system based on FPGA of the present invention comprises: high dynamic image acquisition unit 1, data transmission unit 2, high dynamic image compression unit 3 and image display unit 4; After high dynamic image acquisition unit 1 acquires high dynamic image data, pass The data transmission unit 2 transmits to the high dynamic image compression unit 3, and the high dynamic image compression unit 3 compresses the high dynamic image into a low dynamic image and then transmits it to the image display unit 4 through the data transmission unit 2 for display.

[0033] refer to figure 2 , a high dynamic image compression unit 3, comprising: a gray h...

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Abstract

The invention discloses a high dynamic image compression system based on an FPGA. The system is mainly used for solving the problem that the prior art is low in timeliness, depends on a high power platform and is low in portability. The system comprises a high dynamic image collection unit (1), a data transmission unit (2), a high dynamic image compression unit (3) and an image display unit (4). The high dynamic image collection unit obtains high dynamic image data and then transmits the data to the high dynamic image compression unit through the data transmission unit. The high dynamic imagecompression unit compresses high dynamic images into low dynamic images and then transmits the images to the image display unit for display through the data transmission unit. According to the system,hardware acceleration is carried out on an image entropy maximum high dynamic image compression algorithm, processing speed and data throughput of the system are improved, portability of the system is improved through utilization of an embedded platform based on the FPGA, system power consumption is reduced, and the system can be applied to a high dynamic image compression technology in an embedded environment.

Description

technical field [0001] The invention belongs to the technical field of image processing, and further relates to a high dynamic image compression processing system, which can be used to compress the dynamic range of the high dynamic image in an embedded scene. Background technique [0002] High dynamic range HDR images can fully display the details of the scene. However, the existing display devices cannot directly display images due to the limited dynamic range. Therefore, it is necessary to compress the dynamic range of the high dynamic image to meet the display requirements of the monitor. The global compression algorithm based on the largest image entropy has high computational efficiency, low algorithm complexity, and good image effect after compression. It is one of the more efficient high-dynamic image compression algorithms at present. However, this algorithm requires a platform based on the central processing unit CPU, which has high power consumption and large vol...

Claims

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Application Information

Patent Timeline
14 Sep 2018
Publication
CN108540808A
IPC
H04N19/423; H04N19/90
CPC
H04N19/423; H04N19/90
Inventors
李甫; 胡晨光