Power supply driving device and random access memory
A random access memory, power-driven technology, applied in static memory, digital memory information, information storage, etc., can solve the problems of driver current consumption, increase in driver current consumption, affecting the function of functional modules, etc., to reduce the current consumption, The effect of extending the on-time
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0047] A kind of power drive device for driving the function module in the random access memory of this embodiment, according to figure 1 with Figure 5 As shown, it includes a delay control circuit 110 , a driver 120 and a power drive module 130 .
[0048] The input terminal of the delay control circuit 110 is used as a control signal input terminal for receiving the first control signal, and the delay control circuit 110 is used for delaying the trigger edge of the input first control signal for a predetermined time to generate the first control signal. Two control signals.
[0049] The driver 120 includes a driving PMOS transistor 121 and a driving NMOS transistor 122, the source of the driving PMOS transistor 121 is connected to a power supply voltage; the drain of the driving PMOS transistor 121 is connected to the drain of the driving NMOS transistor 122 The first node 123, the source of the driving NMOS transistor 122 is grounded, the gate of the driving NMOS transist...
Embodiment 2
[0071] Based on embodiment one, refer to Figure 5 As shown, the input end of the power driving module 120 in this embodiment is connected to the low voltage end of the functional module 110, and the output end of the power driving module 120 is grounded.
[0072] In a specific embodiment, according to Figure 5 As shown, the power drive module 130 includes an array composed of a plurality of NMOS transistors 132, the delay control circuit 110 delays the rising edge of the input first control signal for a predetermined time, when the first control signal When the cycle time is less than the predetermined time, the second control signal does not generate a rising edge in a unit time, so that the third control signal does not generate a falling edge in a unit time.
[0073] The drains of the NMOS transistors 132 are all connected to the low-voltage end of the functional module 140, the sources of the NMOS transistors 132 are connected to the functional module 140, and the gates...
Embodiment 3
[0080] The random access memory of this embodiment includes the driver described in the third embodiment; wherein, the preset time is set according to the working sequence of the corresponding functional module 110 to delay the connection between the functional module 110 and the power supply connection The turn-on time of the power driving module 130 reduces the current consumed by the driver 130 when the MOS transistor is switched frequently.
[0081] In this embodiment, the conduction time of the power drive module 130 connected between the functional module 110 and the power supply is delayed, and when the working sequence of the functional module 110 is satisfied, an appropriate preset time for the delay is selected to prolong the power supply. The conduction time of the MOS tube connected between the functional module 100 and the power supply is used to reduce the current consumed by the driver 130 when the MOS tube in the power drive module 130 connected between the func...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 


