Flip-chip package structure
A flip-chip packaging and packaging-based technology, applied in electrical components, electrical solid-state devices, circuits, etc., can solve the problems of bump exposure, holes, bump cracks, etc., to avoid holes and save materials.
Inactive Publication Date: 2018-10-16
上海卓弘微系统科技有限公司
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Problems solved by technology
[0003] In the existing flip-chip packaging structure, the primer layer is poured between the substrate and the substrate to cover the solder bumps. Since the primer layer cannot completely fill the gap between the solder bumps, holes will be formed in the primer layer. , so that part of the bump is exposed to the environment; the bump is easily affected by external conditions such as humidity and other conditions to produce cracks, which in turn affects the reliability of the flip-chip packaging structure
[0004] In order to solve the defect of holes in traditional flip-chip packaging, it is necessary to propose an improved packaging structure
Method used
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Embodiment
[0020] Embodiment: A flip-chip packaging structure that avoids voids is improved.
[0021] A flip-chip package that avoids holes, the structure refers to the attached Figure 1-3 As shown, including 1. Wafer 2. Cylindrical bump 3. Substrate 4. Metal bump 5. Cylindrical space. It is characterized in that the bottom bump 2 of the chip 1 to be packaged is improved into a cylindrical shape, and at the same time, the substrate 3 for receiving the chip is also improved, and a cylindrical groove 5 is formed on its surface; during flip-chip welding, the cylindrical The shape bump 2 is electrically connected with the metal bump 4 in the substrate through high-temperature melting. After soldering, possible voids are eliminated by a reflow process.
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The invention discloses a flip-chip package structure, and the structure comprises a packaged semiconductor wafer, wherein the packaged semiconductor wafer is characterized in that the surface is provided with a plurality of metal projection blocks which are arranged at certain intervals, and the metal projection blocks are cylindrical, and are made of aluminum; a packaging substrate made of BPSG(boro-phospho-silicate-glass), wherein the packaging substrate is characterized in that the upper surface of the substrate is provided with a plurality of cylindrical recesses corresponding to the projection blocks, and the bottom of the substrate is provided with an aluminum welding point with a certain thickness; The wafer is bonded in the recesses through the conductive projection blocks in a flip-chip manner. The structure can cut off the connection of the projection blocks through pre-formed grooves during welding, thereby preventing short-circuit faults. Because the selected substrate material has a melting point close to the melting point of the aluminum projection block, and the holes between the wafer and the substrate can be reduced through the reflowing technology.
Description
technical field [0001] The invention relates to the technical field of semiconductor device packaging, in particular to a flip-chip packaging structure. Background technique [0002] Flip Chip Package Technology mainly arranges multiple bonding pads on the active surface of the chip, and forms bumps on these pads respectively. The bumps are electrically connected to the bumps in the substrate to realize flip-chip connection. It is worth noting that because flip-chip bonding technology can be used in high-pin-count (High Pin Count) chip packaging structures, and has many advantages such as smaller packaging area and shorter signal transmission path, flip-chip packaging technology is currently Has been widely used in the field of chip packaging. [0003] In the existing flip-chip packaging structure, the primer layer is poured between the substrate and the substrate to cover the solder bumps. Since the primer layer cannot completely fill the gap between the solder bumps, hol...
Claims
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IPC IPC(8): H01L23/498H01L23/15H01L23/488
CPCH01L24/16H01L23/15H01L23/49838H01L2224/16059H01L2224/16237
Inventor 陆宇
Owner 上海卓弘微系统科技有限公司