A digital delay system for sonar system testing and its realization method

Abstract

The invention discloses a digital delay system for sonar system testing and its implementation method. The system includes a first delay unit, a synchronization unit and a second delay unit; the method includes: according to the first delay value, through The first delay unit converts the original signal waveform data into signal waveform data with a corresponding number of clock delays; the synchronization unit samples the D / A clock and the converted signal waveform data through the high-frequency clock, and samples the high-frequency clock Synchronous processing is performed with the sampling result; according to the second delay value, the second delay unit performs delay processing on the synchronous processing result. Compared with the existing digital delay method using only one delay unit, the present invention uses two delay units to perform two-level delay, which reduces the need for hardware resources while ensuring the amount of delay and delay accuracy. The demand is low, and the cost is low, and can be widely used in the technical field of sonar system testing.

Description

technical field [0001] The invention relates to the technical field of sonar system testing, in particular to a digital delay system used for sonar system testing and an implementation method thereof. Background technique [0002] The sonar or torpedo emits the acoustic pulse signal in the self-guiding seawater, and then receives the reflected echo of the target, and obtains the target's azimuth, speed and other parameters by processing the echo. The control of the transmitting and receiving azimuth is realized by transmitting or receiving the phase of the signal on the transducer matrix. When testing sonar and torpedo sound self-guidance, it is necessary to simulate the orientation of the target, so it is necessary to simulate the position of the transducer matrix. The phase difference of each array element when receiving target signals from different azimuths, that is, there is a certain relative delay between the array element signals. [0003] Domestic and foreign test ...

AI Technical Summary

Problems solved by technology

[0005] However, the existing digital delay circuits generally only use one delay unit, and the maximum delay value that can be set by this digital delay module determines its demand for hardware resources, for example: when the delay accuracy is high , the frequency of the input clock must be increased, and in order to ensure the maximum amount of delay, the number of delay units in the delay module must also be increased, thereby increasing the demand for system hardware resources

To sum up, the existing digital delay methods have high requirements on hardware resources, especially when the delay accuracy is high and there are many channels, the required resources are higher, which brings higher component costs

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