Manufacturing method and structure of lead frame with lines
A lead frame and manufacturing method technology, applied in semiconductor/solid-state device manufacturing, circuits, semiconductor devices, etc., can solve problems such as high difficulty, long manufacturing process, poor yield, etc., and achieve high design flexibility, reduced manufacturing costs, The effect of improving the production yield
Active Publication Date: 2020-05-15
FUSHENG ELECTRONICS CORP
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- Abstract
- Description
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- Application Information
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Problems solved by technology
[0005] Therefore, the main purpose of the present invention is to provide a method for manufacturing a lead frame with lines and its structure, to solve the problem of long production process, high difficulty, poor yield rate and limited spacing between pins in the prior art. irreducible defect
Method used
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[0059] Relevant technical content and detailed description of the present invention, now coordinate drawing description as follows:
[0060] see figure 2 , a schematic flow chart of the method for making a lead frame with lines of the present invention, and refer to it together Figure 3-12 . As shown in the figure: in the method for manufacturing a lead frame with circuits in the present invention, a metal plate 10 is punched to form a lead frame 1 first, and then a platform 2 is injected on the lead frame 1 using colloid, and a platform 2 is fabricated on the platform 2 The line 3 of the lead frame 1 makes the design of the lead frame 1 more flexible, so that the design of the line 3 can be changed at any time and the line spacing between the lines 3 can be reduced even smaller, and the production of the pins is also canceled, making the production more efficient. It is simple, and the production cost is also greatly reduced, and the production yield rate is improved.
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The invention provides a wire frame manufacturing method with a circuit and structure thereof. The method comprises the following steps that a metal plate is prepared. The metal plate is punched to form at least one wire frame, each wire frame is provided with an edge frame, a plurality of connecting rods, a metal chip base and a penetrating area; the plurality of connecting rods are connected with the edge frame and the metal chip base. A platform is formed in the through region, and the platform is provided with a front surface and a back surface. A plurality of trenches are formed on one side surface of the platform and a plurality of through holes are formed in the plurality of trenches, the plurality of through holes penetrate through the front surface and the back surface of the platform. A circuit is formed in the plurality of trenches and the plurality of through holes of the platform, wherein the circuit penetrates through the front surface and the back surface of the platform. According to the invention, the circuit can be designed and changed at any time, so that the line spacing is reduced, the manufacturing is simpler, the cost is greatly reduced, and the yield is improved.
Description
technical field [0001] The present invention relates to a lead frame, especially a quad flat no lead package (Quad Flat No leads, QFN), which is used to make a lead frame (Chip-on-Lead) that is fixedly connected to a chip and has double-sided circuit conduction. method. Background technique [0002] It is known that when the current IC semiconductor chip or light-emitting diode light-emitting chip is packaged, the chip is first bonded to the wire frame, and then the gold wire is used to electrically connect the chip to the inner pin circuit. A package is formed on the chip and the lead frame with resin, and then cut into individual semiconductor elements. [0003] And the manufacturing cost and yield rate of above-mentioned semiconductor element have very big relation with the making of this lead frame, in the past traditional lead frame 200 (such as figure 1 ) during production, a metal plate 100 is formed by stamping or etching technology, and the finished lead frame 200...
Claims
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IPC IPC(8): H01L23/495H01L21/48
CPCH01L21/4825H01L23/49524
Inventor 朱振丰胡俊良刘楹洲陈原富
Owner FUSHENG ELECTRONICS CORP