A kind of multi-time programmable (mtp) memory unit structure and its manufacturing method
A storage unit, one-to-one correspondence technology, applied in electrical components, semiconductor devices, circuits, etc., can solve the problems of leakage of electrons, stored data errors, deviation of electrons from ideal values, etc., to ensure reliability and improve usage. effect of life
Active Publication Date: 2021-12-17
海科(嘉兴)电力科技有限公司
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Problems solved by technology
As the number of power on and off increases, more and more defects will appear in the oxide layer 3, and these defects will capture the migrating electrons 6 during power on and off, resulting in the deviation of the stored electron 6 number from the ideal value; at the same time, through Research has found that with the use of the device, not the entire floating gate layer 5 will age together, but local aging slowly. As the floating gate layer 5 ages, the electrons 6 stored in the floating gate layer 5 will also leak with a certain probability. , causing storage data errors
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[0023] The technical solution of the present invention will be described in further non-limiting detail below in combination with preferred embodiments and accompanying drawings.
[0024] figure 1 It is a structural schematic diagram of a memory cell based on a new floating gate structure corresponding to a preferred embodiment of the present invention, including a gate layer 1, a substrate layer 4, and a floating gate layer 5 between the gate layer 1 and the substrate layer 4. An oxide layer 3 is provided between the electrode layer 1 and the floating gate layer 5, and between the floating gate layer 5 and the substrate layer 4, and insulating layers are respectively provided on both sides of the gate layer 1, the floating gate layer 5 and the oxide layer 3. Layer 2, the floating gate layer 5 is divided into several sub-floating gate layers 7, and an insulating medium 8 is filled between two adjacent sub-floating gate layers 7, and the gate layer 1 is divided into several su...
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The invention discloses a multi-time programmable (MTP) memory cell structure and a preparation method thereof, comprising a gate layer (1), a substrate layer (4), and a gate layer (1) and a substrate layer (4) located between the gate layer (1) and the substrate layer (4). The floating gate layer (5) is provided with an oxide layer (3) between the gate layer (1) and the floating gate layer (5), and between the floating gate layer (5) and the substrate layer (4), respectively. It is characterized in that: the floating gate layer (5) is divided into several sub-floating gate layers (7), and an insulating medium (8) is filled between two adjacent sub-floating gate layers (7). The invention aims to enhance the reliability of the multiple-time programmable (MTP) memory cell, reduce the influence of aging on the floating gate device, and improve the service life of the device.
Description
technical field [0001] The invention relates to the field of integrated circuit chips, and more specifically relates to a multiple-time programmable (MTP) storage unit structure and a manufacturing method thereof. Background technique [0002] With the development of semiconductor technology, more and more people use semiconductor chips to store data; especially in a micro central processing unit (MCU), a large number of easy-to-integrate storage units will be used. According to different storage types, we can divide these storage units into one-time programmable (OTP), multiple times programmable (MTP), flash memory (Flash) and so on. OTP storage can be used for one-time data writing, and then the program will be solidified. It is cheap and suitable for low-cost applications with customization needs; Flash storage can be repeatedly erased and written, which is very flexible, but the cost is high, suitable for low-cost applications. Sensitive occasions may be used for devel...
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IPC IPC(8): H01L27/11521H01L29/423H10B41/30
CPCH01L29/42332H10B41/30
Inventor 朱明皓李瑞钢
Owner 海科(嘉兴)电力科技有限公司