Method and apparatus for using non-uniform under sampling to achieve a software defined radio for NFC applications

Abstract

Various embodiments relate to a method and apparatus for a method for under sampling a RF carrier signal, the method including receiving, by an analog digital converter, the RF carrier signal, selecting, by a multiplexer, a clock signal which includes a first clock signal and a second clock signal which are phase shifted , receiving, by the ADC, the clock signal which has a frequency less that thefrequency of the RF carrier signal, sampling, by the ADC, the RF carrier signal using the selected clock signal and demodulating, by a digital signal processor, the RF carrier signal into I channel data and Q channel data for I / Q demodulation.

Description

technical field [0001] The present disclosure relates generally to methods for undersampling a signal, and more particularly, but not exclusively, to a method using a clock signal that reduces the sampling frequency of an Analog to Digital Converter ("ADC") A Near Field Communication ("NFC") integrated circuit that under-samples a signal carrier. Background technique [0002] Current analog front-end integrated circuits include complex sections for signal preprocessing, such as mixers or baseband amplifiers (BBAs), which amplify the received signal before digitizing it using two separate ADCs. Or attenuate the received signal. [0003] Such as figure 1 As shown in , the integrated circuit 100 may include an antenna 101, a high frequency attenuator (High Frequency Attenuator, "HF-ATT") 102, two mixers 103 and 104, two low-pass 105, 106, two BBA 107 , 108, two ADCs 109, 110, and DSP 111. [0004] Since two signal paths are essentially necessary, each function needs to be i...

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Problems solved by technology

[0006] Two ADCs 109 and 110 are required, which requires more chip space and higher power consumption, and since the integrated circuit 100 needs to generate two clocks, one of which is phase shifted by 90° from the other, there is a lag in the phase shifting channel time, which adds extra noise to the signal, driving the SNR down

[0007] in addition, figure 1 Mixers 103 and 104 in may exhibit poor power supply rejection, adding additional noise to the signal, and mixers 103 and 104 may perform phase noise to magnitude noise conversion due to clock signal uncertainty

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