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Test structure and test method for evaluating tddb polarity difference of gate oxide layer

A technology of test structure and test method, applied in semiconductor/solid-state device testing/measurement, semiconductor/solid-state device components, semiconductor devices, etc., to achieve the effect of improving reliability

Active Publication Date: 2020-04-28
YANGTZE MEMORY TECH CO LTD
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, in the prior art, usually only the time-dependent breakdown performance of the gate oxide layer in one polarity state can be tested in one test

Method used

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  • Test structure and test method for evaluating tddb polarity difference of gate oxide layer
  • Test structure and test method for evaluating tddb polarity difference of gate oxide layer
  • Test structure and test method for evaluating tddb polarity difference of gate oxide layer

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Experimental program
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Embodiment Construction

[0025] As mentioned in the background, existing test structures perform poorly.

[0026] For the gate oxide layer in MOS transistors, the upper interface and lower interface of the gate oxide layer will be affected by many processes, so that the time-dependent breakdown performance of the gate oxide layer is affected, and the time-dependent breakdown performance of the gate oxide layer shows Dependence on polarity. The dependence of the time-dependent breakdown performance of the gate oxide layer on polarity refers to the time-dependent breakdown of the gate oxide layer when the polarities of the electrical states of the MOS transistor are accumulation and inversion states. Performance is different.

[0027] For example, for NMOS transistors, when a positive potential is applied to the gate of the NMOS transistor and a negative potential is applied to the back gate, the NMOS transistor is in inversion mode. When a negative potential is applied to the gate of the NMOS transist...

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Abstract

A t structure and a test method for evaluate a polarity difference of a gate oxide layer TDDB. That test structure comprises a first t transistor. In the first test transistor, a first back gate is respectively connected with a first source stage and a first drain; A first measurement module connected to the first gate; A second test transistor, wherein the second back gate is connected to the second source stage and the second drain, respectively, and the second back gate and the first back gate are connected to each other; A second measurement module connected to the second gate, the secondmeasurement module and the first measurement module being adapted to perform constant current pressurization on the first test transistor and the second test transistor, wherein the first test transistor and the second test transistor are in different polarities in an electrical state when the first test transistor and the second test transistor are under constant current pressurization; A third measurement module connected to the second back gate and the first back gate, respectively. The test structure improves the reliability of evaluating the performance of the gate oxide layer TDDB.

Description

technical field [0001] The invention relates to the field of semiconductor testing, in particular to a testing structure and testing method for evaluating the TDDB polarity difference of a gate oxide layer. Background technique [0002] With the continuous improvement of VLSI integration, the gate oxide layer in MOS transistors is also becoming thinner, but the impact of higher electric field strength on the performance of the gate oxide layer has become a prominent problem. Therefore, the breakdown of the gate oxide layer, such as time dependent dielectric breakdown (TDDB, time dependent dielectric breakdown) of the gate oxide layer has always been a hot issue in the field of VLSI reliability research. [0003] The upper interface and the lower interface of the gate oxide layer are affected by many processes, so that the time-dependent breakdown performance of the gate oxide layer is affected, and the time-dependent breakdown performance of the gate oxide layer is dependent...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/544H01L21/66
CPCH01L22/14H01L23/544
Inventor 杨盛玮韩坤
Owner YANGTZE MEMORY TECH CO LTD
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