A kind of preparation method of interdigitated back contact heterojunction solar cell

A solar cell and back-contact technology, applied in the field of solar cells, can solve the problems of reduced carrier collection efficiency, reduced battery short-circuit current density, reduced area, etc. effect of width

Active Publication Date: 2021-02-12
XIAN UNIV OF TECH
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  • Abstract
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AI Technical Summary

Problems solved by technology

The large width of the isolation layer leads to a reduction in the area of ​​the P-type amorphous silicon layer and the N-type amorphous silicon layer, and the carrier collection efficiency decreases, resulting in a decrease in the short-circuit current density of the battery

Method used

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  • A kind of preparation method of interdigitated back contact heterojunction solar cell
  • A kind of preparation method of interdigitated back contact heterojunction solar cell

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Embodiment Construction

[0032] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0033] Such as figure 1 As shown, a back contact heterojunction solar cell, taking N-type silicon as the substrate as an example, includes an N-type monocrystalline silicon substrate 1, a front intrinsic amorphous silicon passivation layer 2, and a front N-type amorphous silicon layer 3. An anti-reflection layer 4, an intrinsic amorphous silicon passivation layer 5 on the back, an N-type amorphous silicon layer 6 on the back, a P-type amorphous silicon layer 7, a contact layer 8, and an insulating isolation layer 9.

[0034] combine figure 2 The schematic diagram of the preparation method for the back of the interdigitated back-contact heterojunction solar cell is shown, and the specific implementation of the present invention is described as follows.

[0035] (a...

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Abstract

The invention discloses a preparation method of a back contact heterojunction solar cell. Intrinsic amorphous silicon front passivation layer, front N-type amorphous silicon layer and anti-reflection layer are sequentially deposited on the front side of the single crystal silicon substrate after cleaning, de-damaging layer, and texturing; on the back of the cell, intrinsic amorphous silicon is deposited Back passivation layer; Deposit a P-type amorphous silicon layer with a mask method on the surface of the back passivation layer, then directly deposit the insulating isolation layer between the P-type amorphous silicon layer and the N-type amorphous silicon layer, and use light The engraving method is etched according to the preset width of the insulating isolation layer; further, the N-type amorphous silicon layer on the back is deposited by a mask method; finally, a transparent conductive film and a metal film are sequentially deposited by a mask process to form a contact layer, and the solar cell of the present invention is completed. Cell preparation. The invention improves the preparation process precision of the back structural pattern of the HBC single crystal silicon solar cell, reduces the width of the isolation layer, and improves the collection probability of photogenerated carriers and the short-circuit current density of the HBC solar cell.

Description

technical field [0001] The invention relates to the technical field of solar cells, in particular to a method for preparing an interdigitated back contact heterojunction solar cell. Background technique [0002] Interdigitated Back Contact Silicon Heterojunction Solar Cell (HBC solar cell for short) has both interdigitated back contact solar cell (Interdigitated back contact Solar Cell, IBC solar cell for short) and solar cell with The advantages of the thin intrinsic layer heterojunction solar cell (Heterojunction with Intrinsic Thin-layer Solar Cell, referred to as HIT solar cell) not only remove the metal electrode on the front surface, reduce the shading loss, obtain a large short-circuit current, but also pass Inserting a layer of high-quality intrinsic amorphous silicon passivation layer between heavily doped amorphous silicon and crystalline silicon greatly reduces the interface state, reduces surface recombination, and improves the open circuit voltage. It is current...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L31/20H01L31/068
CPCH01L31/0682H01L31/202Y02E10/547Y02P70/50
Inventor 封先锋李雨菲高萌
Owner XIAN UNIV OF TECH
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