Parallel structure, manufacturing method thereof, and electronic equipment including the parallel structure

Abstract

Disclosed are a parallel structure, a manufacturing method thereof, and electronic equipment including the parallel structure. The parallel structure includes alternately stacked source / drain layers and channel layers on the substrate, and gate stacks respectively formed around at least part of the periphery of each channel layer. Each channel layer, source / drain layers on its upper and lower sides, and gate stacks formed around it constitute a corresponding semiconductor device. In each semiconductor device, one of the source / drain layers on the upper and lower sides of the corresponding channel layer is in contact with the first conductive channel arranged on the outer periphery of the active region, and the other source / drain layer is in contact with the first conductive channel arranged on the outer periphery of the active region. The two conductive channels are in contact, and the gate stack formed around the channel layer is in contact with the third conductive channel disposed on the periphery of the active region. The first conductive path is common to all semiconductor devices, the second conductive path is common to all semiconductor devices, and the third conductive path is common to all semiconductor devices.

Description

technical field [0001] The present disclosure relates to the field of semiconductors, and more particularly, to a compact parallel structure of a semiconductor device, a method of manufacturing the same, and an electronic device including such a parallel structure. Background technique [0002] Vertical devices have good device characteristics, such as good electrostatic properties, good control of short channel effects, small sub-threshold swing, and resulting low power consumption. This enables further scaling of the device to increase integration density. In some applications it is necessary to connect several transistors in parallel, for example in order to obtain a large drive current to drive other devices. These transistors can be stacked vertically to save area. However, the formation of interconnections between transistors is difficult. Contents of the invention [0003] In view of this, it is an object of the present disclosure to provide, at least in part, a ...

AI Technical Summary

Problems solved by technology

However, the formation of interconnections between transistors is difficult

Images