A software test platform based on sip chip

Abstract

The invention belongs to the technical field of software testing, in particular to a software testing platform based on a SIP chip. The software test platform is composed of LabView or serial ports. The upper computer completes multiple handshakes with the lower computer through a robust communication protocol to ensure the stability of information transmission; through the autonomous power-down function added to the protocol, the safety of the test platform is ensured. It can be improved; using the diversified test mode mainly based on LabView test and supplemented by serial port test, the test methods of the test platform tend to be diversified, which is convenient for practical application. The test report in the background records all the information of the test platform in real time and gives timely feedback to It is convenient for testers to discover and correct the deficiencies of the test platform and correct them; the lower computer part is composed of ARM chip, main control chip and chip to be tested, and communicates with each other through dual-port RAM to improve data transmission rate and utilize robust communication The protocol uses multiple handshakes and uses algorithms to encrypt instructions to ensure the stability of information exchange between chips. The secondary verification of ARM chips ensures the accuracy of test results; the reusability of test cases greatly reduces the cost of test platforms. The linkage test between them makes the test platform more practical, and the master-slave test mode makes it easier to add external expansion chips and meet the needs of test functions.

Description

technical field [0001] The invention belongs to the technical field of software testing, in particular to a software testing platform based on a SIP chip. Background technique [0002] With the continuous development of software development technology, people have begun to realize that simple system debugging cannot find errors in the program, and as the complexity of the system increases, more and more hidden dangers are difficult to find. For this reason, people begin to pay attention to software quality and software testing, and the development of software testing platforms is increasingly favored by people. However, the test platform is an emerging technology, especially in the field of SIP integrated chip testing. Due to the late start of domestic SIP chip integration and packaging technology, most of the existing software test platforms have the following problems: [0003] 1. The cost of the test platform is high [0004] Most of the software test platforms at this ...

AI Technical Summary

Problems solved by technology

This patent only tests the radio frequency and baseband modules of SIP chips, and verifies the quality of SIP chips through comparison. Multiple utilization across platforms leads to a further increase in cost, which is not conducive to the promotion and practical application of the test platform

[0005] 2. Poor communication stability and lack of linkage test between chips

[0006] Due to a lot of interference in the real environment, the complexity of the actual operating environment, and the increasing user demand, the difficulty of the test system has increased. On a test platform with various hardware types, how to ensure the stability and accuracy of data transmission, and how to implement Completing the functional linkage test of different chips on the same platform has become a stumbling block hindering the development of the test platform

Invention patent in China, a chip test platform (authorized announcement number: CN 204832267 U, authorized announcement date: 2015.12.02), although the test platform realizes the test of different chips, but the test platform can only target a single chip at the same time For testing, the functional linkage test between multiple chips and various chips cannot be completed, and the corresponding communication protocol is not defined to complete this type of test, and the test of a whole system cannot be completed, so the chip test platform will have in practical applications. Big deficiency

[0007] 3. The test method is too single and lacks an error feedback mechanism

[0008] Since the test platform started late and is suitable for projects with a long cycle, in general, people use manual testing when testing. Later, with the increase in complexity and test content, the combination of man and machine began to become more and more complex. Many, such as a Chinese invention patent, a chip test platform (authorized announcement number: CN 204832267 U, authorized announcement date: 2015.12.02), this test platform provides a button test mode, but lacks an error feedback mechanism, so it cannot be understood in time Where is the specific problem; another example is the Chinese invention patent: a SIP chip test platform and method (application number: 201310045045.6, application date: 2013.02.05), the test platform has few test items, and it still provides manual testing, which is not conducive to Mass production and promotion; but in most cases there will be emergencies, so it is best to let the test platform do it in practical applications, with a certain test method as the main method and a variety of test methods as supplementary, and the error generated in the chip , to achieve timely feedback and precise positioning

[0009] 4. The automatic power-off protection mechanism is not perfect

Considering that the domestic test platform technology research is relatively late, and the SIP chip technology is not very mature, so this function rarely appears in the current existing test platform

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