Three-dimensional memory and method of forming three-dimensional memory
A memory and memory layer technology, applied in semiconductor devices, electrical solid state devices, electrical components, etc., can solve problems such as incomplete filling of metal gates, increased resistance of metal gate layers, easy blockage of gate trench openings, etc. , to achieve the effect of increasing step coverage, reducing resistance, and improving load effect
Active Publication Date: 2020-07-10
YANGTZE MEMORY TECH CO LTD
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However, the smaller gate trench size will cause the opening of the gate trench to be easily blocked when the metal gate is filled, resulting in incomplete filling of the metal gate and increased resistance of the metal gate layer, thereby affecting the performance of the storage device
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[0032] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.
[0033] In the following description, many specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways than those described here, so the present invention is not limited by the specific embodiments disclosed below.
[0034] As indicated in this application and claims, the terms "a", "an", "an" and / or "the" do not refer to the singular and may include the plural unless the context clearly indicates an exception. Generally speaking, the terms "comprising" and "comprising" only suggest the inclusion of clearly identified steps and elements, and these steps and elements do not constitute an exclusive list, and the method or device may also contain other st...
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The present invention provides a three-dimensional memory, comprising: a substrate; gate layers and spacer layers alternately stacked on the substrate along a direction perpendicular to the substrate; Channel holes of the alternately stacked gate layers and spacer layers; and a gate dielectric layer and a memory layer arranged sequentially in the channel holes along the radial direction of the channel holes from outside to inside. There is no gate dielectric layer between the gate layer and the spacer layer in the three-dimensional memory of the present invention, which is beneficial to the filling of the gate layer and can reduce the resistance value of the gate layer. In addition, since there is no gate dielectric layer between adjacent gate layers, the dielectric constant between adjacent gate layers is reduced, and the resistance-capacitance delay effect and coupling effect between gate layers are reduced.
Description
technical field [0001] The present invention mainly relates to the field of semiconductors, in particular to a three-dimensional memory and a method for forming the three-dimensional memory. Background technique [0002] With the continuous improvement of the market's requirements for storage density, the reduction of key dimensions of two-dimensional memory has reached the limit of mass production technology. In order to further increase storage capacity and reduce costs, a three-dimensional structure memory is proposed. [0003] In order to increase the storage density, it is generally realized by increasing the number of stacked layers in the three-dimensional memory. At this time, the thickness of the single layer of the stacked layer will be appropriately reduced to reduce the influence of stress. However, the smaller gate trench size will cause the opening of the gate trench to be easily blocked when the metal gate is filled, resulting in incomplete filling of the met...
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IPC IPC(8): H01L27/11568H01L27/11578H10B43/30H10B43/20
CPCH10B43/30H10B43/20
Inventor 王启光靳磊李达许锋刘红涛
Owner YANGTZE MEMORY TECH CO LTD