Level shifting circuit
A level shift circuit and level shift technology, applied in the direction of logic circuit, logic circuit interface device, logic circuit connection/interface layout, etc., can solve the problems of high power consumption, low level speed and speed, and reduce the signal Changeover times, improved manufacturability, size-insensitive effects
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[0029] figure 1 It is a structural schematic diagram of a level shift circuit 1 in the prior art. refer to figure 1 , The level shift circuit 1 includes: a first PMOS transistor P1, a second PMOS transistor P2, a first NMOS transistor N1, a second NMOS transistor N2, and an inverter INV1.
[0030] The inverter INV1 and the signal IN output from the low-voltage signal output terminal (that is, the input signal of the level shift circuit, hereinafter referred to as the input signal) all work in the low-voltage domain VDD1, and the first PMOS transistor P1, the second PMOS transistor P2, and the second PMOS transistor P2 Both the first NMOS transistor N1 and the second NMOS transistor N2 work in the high voltage domain VDD2, and the output signal OUT of the first output terminal and the output signal OUTB of the second output terminal are opposite in logic, and also work in the high voltage domain VDD2.
[0031] In a steady state, when the input signal IN is at a low level (ie ...
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