Semiconductor device, manufacturing method thereof, and electronic equipment including the same
A semiconductor and device technology, which is applied in the field of vertical semiconductor devices and their manufacture, and electronic equipment, can solve the problems of device area increase, etc., and achieve the effect of reducing the occupied area and eliminating offset
Active Publication Date: 2020-09-11
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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- Abstract
- Description
- Claims
- Application Information
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Problems solved by technology
This leads to an increase in device area
Method used
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[0012] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the present disclosure. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present disclosure.
[0013] Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. The figures are not drawn to scale, with certain details exaggerated and possibly omitted for clarity of presentation. The shapes of the various regions and layers shown in the figure, as well as their relative sizes and positional relationships are only exemplary, and may deviate due to manufacturing tolerances or technical limitations in practice, and those skilled in the art will Regions / layers with different shapes, ...
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Abstract
Disclosed are a vertical semiconductor device, a method of manufacturing the same, and electronic equipment including the semiconductor device. According to an embodiment, a vertical semiconductor device may include: a vertical active region disposed on a substrate, including a first source / drain layer, a channel layer, and a second source / drain layer stacked in sequence; A gate stack formed at least part of the periphery of the layer; and at least one of the following: a first electrical connection feature for the first source / drain layer, including a first contact disposed above the top surface of the active region and connected to the first contact A first conductive channel that is in contact with and extends from above the top surface of the active region to contact with at least part of the sidewall of the first source / drain layer; and a second electrical connection component for the gate stack, including a A second contact portion above the top surface and a second conductive channel in contact with the second contact portion and extending from above the top surface of the active region to contact with at least part of the sidewall of the gate conductor layer in the gate stack.
Description
technical field [0001] The present disclosure relates to the field of semiconductors, and more particularly, to a vertical type semiconductor device with compact contacts, a method of manufacturing the same, and an electronic device including such a semiconductor device. Background technique [0002] In a horizontal type device such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), the source, gate and drain are arranged in a direction substantially parallel to the surface of the substrate. Due to this arrangement, the horizontal type device cannot be easily further scaled down. Unlike this, in a vertical type device, the source, gate, and drain are arranged in a direction substantially perpendicular to the substrate surface. Therefore, vertical devices are easier to scale down than horizontal devices. [0003] However, in a vertical device, since the source, gate and drain are stacked vertically, the contacts, especially to the gate and the underlying sourc...
Claims
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IPC IPC(8): H01L29/78H01L21/336
CPCH01L29/66666H01L29/7827H01L29/66545H01L29/41741H01L29/161H01L29/7391H01L29/0653H01L29/0649H01L29/401H01L29/417H01L29/42312H01L29/66553H01L29/7788
Inventor 朱慧珑
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI