Semiconductor device and manufacturing method thereof and electronic device comprising semiconductor device
A semiconductor and device technology, which is applied in the field of vertical semiconductor devices and their manufacture, and electronic equipment, can solve the problems of device area increase, etc., and achieve the effect of reducing the occupied area and eliminating offset
Active Publication Date: 2019-03-01
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology
This leads to an increase in device area
Method used
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[0012] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. However, it should be understood that these descriptions are only exemplary and are not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily obscuring the concept of the present disclosure.
[0013] The drawings show various structural schematic diagrams according to embodiments of the present disclosure. The figures are not drawn to scale, some details are enlarged and some details may be omitted for clarity of presentation. The shapes of the various regions and layers shown in the figure and the relative size and positional relationship between them are only exemplary. In practice, there may be deviations due to manufacturing tolerances or technical limitations. Areas / layers with different shapes, sizes, and relative positions can be des...
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Disclosed are a vertical type semiconductor device and a manufacturing method thereof, and an electronic device comprising the semiconductor device. According to the embodiments, the vertical type semiconductor device can comprise a vertical active area and at least one of a first electric connection part and a second electric connection part, wherein the vertical active area is arranged on a substrate; the vertical active area comprises a first source / drain layer, a channel layer and a second source / drain layer which are stacked sequentially; a gate stack is formed by at least part of the periphery of the channel layer; the first electric connection part specific to the first source / drain layer comprise a first contact part arranged above the top surface of the active area, and a first conductive channel which is in contact with the first contact part and extends from the upward side of the top surface of the active area to be in contact with at least a part of the side wall of the first source / drain layer; and the second electric connection part specific to the gate stack comprise a second contact part arranged above the top surface of the active area, and a second conductive channel which is in contact with the second contact part and extends from the upward side of the top surface of the active area to be in contact with at least a part of the side wall of a gate conductorlayer in the gate stack.
Description
Technical field [0001] The present disclosure relates to the field of semiconductors, and more specifically, to a vertical semiconductor device with compact contacts, a method of manufacturing the same, and electronic equipment including such a semiconductor device. Background technique [0002] In a horizontal device such as a metal oxide semiconductor field effect transistor (MOSFET), the source, gate, and drain are arranged in a direction substantially parallel to the surface of the substrate. Due to this arrangement, the horizontal device is not easy to be further downsized. Unlike this, in a vertical device, the source, gate, and drain are arranged in a direction substantially perpendicular to the surface of the substrate. Therefore, compared to horizontal devices, vertical devices are easier to shrink. [0003] However, in a vertical device, since the source, gate, and drain are stacked vertically, the contact part, especially the contact part to the gate and the source or ...
Claims
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Login to View More IPC IPC(8): H01L29/78H01L21/336
CPCH01L29/66666H01L29/7827H01L29/66545H01L29/41741H01L29/161H01L29/7391H01L29/0653H01L29/0649H01L29/401H01L29/417H01L29/42312H01L29/66553H01L29/7788
Inventor 朱慧珑
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI