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Radar signal processing platform based on FPGA, DSP and ARM

A radar signal processing and ARM processor technology, applied in radio wave measurement systems, instruments, etc., can solve the problems of direct storage, the data rate of the general processing platform of radar signals cannot be directly processed, etc., and meet the requirements of low power consumption and saving , the effect of saving import time

Pending Publication Date: 2019-03-26
SPEED SPACE TIME INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the data rate of the radar signal general processing platform cannot realize direct processing and direct storage

Method used

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  • Radar signal processing platform based on FPGA, DSP and ARM
  • Radar signal processing platform based on FPGA, DSP and ARM
  • Radar signal processing platform based on FPGA, DSP and ARM

Examples

Experimental program
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Embodiment 1

[0025] Embodiment 1: as Figure 5As shown, the radar signal processing platform based on FPGA, DSP and ARM includes an FPGA chip, a DSP chip, an ARM processor module and 4 off-chip memories SSRAM, and the DSP chip, the ARM processor module and the chip The external memory is connected with two-way communication between the FPGA chip; the FPGA is used to be responsible for completing digital down-conversion, sequential circuit generation, peripheral interface circuit, and radar signal processing, and the DSP chip is used to complete sliding window detection and Dot trace aggregation algorithm; the ARM processor is used for communication control between the signal processing platform and the radar terminal and other subsystems, and can participate in receiving / transmitting correction calculations; the off-chip memory is used to store temporary A large number of intermediate calculation results stored; the radar signal processing platform based on FPGA, DSP and ARM also includes ...

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PUM

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Abstract

The invention provides a radar signal processing platform based on an FPGA, a DSP and an ARM. The radar signal processing platform comprises an FPGA chip, a DSP chip, an ARM processor module and fouroff-chip memories (SSRAM). The DSP chip, the ARM processor module and the off-chip memories are in two-way communication connection with the FPGA chip. The FPGA chip is used for completing digital down conversion, sequential circuit generation, peripheral interface circuit setting, and radar signal processing. The DSP chip is used for completing sliding window detection and performing a dot traceagglomerative algorithm. The ARM processor module is used for communication control of the signal processing platform, the radar terminal and other subsystems and can participate in the receiving / transmitting correction operation. The off-chip memories are used for storing lots of intermediate operation results that need to be stored temporarily during the signal processing operation process. Theplatform has advantages of fast processing speed, flexible design, small size, simple structure, low power consumption and high reliability.

Description

technical field [0001] The invention relates to the technical field of ground and airborne radar system signal processing, in particular to a radar signal processing platform based on FPGA, DSP and ARM. Background technique [0002] The primary purpose of radar signal processing is to eliminate or reduce various interference and noise by processing the received signal, so as to easily extract the required information and improve the quality of information detection. With the gradual maturity of modern radar theory, various advanced radar technologies continue to emerge. The design of these new radar systems and new technologies needs to be realized with the help of radar signal digital processing technology. [0003] The traditional radar signal processing system has a large amount of equipment, complex structure, low reliability and high cost. With the continuous development of integrated circuits, the continuous reduction of device size, the continuous improvement of inte...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01S7/02
CPCG01S7/02
Inventor 孙海峰徐忠建朱必亮李俊冯建亮
Owner SPEED SPACE TIME INFORMATION TECH CO LTD