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A Numerical Comparator Based on tdpl Logic

A numerical comparison and logic technology, applied in the field of numerical comparators based on TDPL logic, can solve the problems of poor anti-reverse engineering ability and non-independent characteristics of circuits.

Active Publication Date: 2022-07-15
NINGBO UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The circuit function and circuit structure of the above-mentioned numerical comparator circuits are relatively fixed, resulting in poor anti-reverse engineering capability of the circuit; the circuit energy consumption and the processed data are not independent of each other, making the circuit vulnerable to differential power analysis attacks; these two The defect makes the numerical comparator used in the cryptographic device system easy to become the breakthrough point of the attack

Method used

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  • A Numerical Comparator Based on tdpl Logic
  • A Numerical Comparator Based on tdpl Logic
  • A Numerical Comparator Based on tdpl Logic

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0019] Example 1: as figure 1 As shown, a numerical comparator based on TDPL logic includes an XOR gate XOR and two NOR gates. The working logic of the XOR gate XOR and the two NOR gates are three-phase dual-rail precharge logic, XOR The gate XOR and the two NOR gates respectively have a first input terminal, a first inverting input terminal, a second input terminal, a second inverting input terminal, a precharge control terminal, an evaluation control terminal, a discharge control terminal, and an output terminal. and the inverting output terminal, the first input terminal of the XOR gate XOR is connected with the first input terminal of the two NOR gates and its connection terminal is the first input terminal of the numerical comparator, which is used to access the first input signal A , the first inverting input terminal of the XOR gate XOR is connected with the first inverting input terminal of the two NOR gates and its connection terminal is the first inverting input term...

Embodiment 2

[0020] Embodiment 2: This embodiment is basically the same as Embodiment 1, and the differences are as follows:

[0021] like figure 2 As shown, in this embodiment, the XOR gate XOR includes a first PMOS transistor P1, a second PMOS transistor P2, a third PMOS transistor P3, a fourth PMOS transistor P4, a fifth PMOS transistor P5, a first NMOS transistor N1, a Two NMOS transistors N2, third NMOS transistor N3, fourth NMOS transistor N4, fifth NMOS transistor N5, sixth NMOS transistor N6, seventh NMOS transistor N7, eighth NMOS transistor N8, ninth NMOS transistor N9, tenth NMOS transistor Tube N10, eleventh NMOS tube N11, twelfth NMOS tube N12, thirteenth NMOS tube N13, fourteenth NMOS tube N14, fifteenth NMOS tube N15, sixteenth NMOS tube N16, seventeenth NMOS tube N17, the eighteenth NMOS transistor N18, the nineteenth NMOS transistor N19, the twentieth NMOS transistor N20 and the twenty-first NMOS transistor N21; the source of the first PMOS transistor P1 is connected to th...

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Abstract

The invention discloses a numerical comparator based on TDPL logic. The first input terminal of the XOR gate is connected to the first input terminal of the two NOR gates, the first inverting input terminal of the XOR gate is connected to the first inverting input terminal of the two NOR gates, and the second input terminal of the XOR gate is connected. The terminal is connected to the second input terminal of the two NOR gates, the second inverting input terminal of the XOR gate is connected to the second inverting input terminal of the two NOR gates, and the precharge control terminal of the XOR gate is connected to the two The precharge control terminal of the NOR gate is connected, the evaluation control terminal of the XOR gate is connected with the evaluation control terminals of the two NOR gates, and the discharge control terminal of the XOR gate is connected with the discharge control terminals of the two NOR gates; The advantage is that it has both anti-reverse engineering and differential power analysis capabilities.

Description

technical field [0001] The present invention relates to a numerical comparator, in particular to a numerical comparator based on TDPL logic. Background technique [0002] With the development of integrated circuits and computer technology, cryptographic devices are widely used in fields such as smart cards and e-commerce, which greatly ensures the security of the system. However, when a cryptographic device processes different data, its physical information, such as energy consumption, running time and electromagnetic radiation, has a certain correlation with the processed data. Attackers usually use these physical information to attack cryptographic devices to obtain key information. Reverse engineering and differential power analysis have become important means of stealing intellectual property core information. Therefore, cryptographic devices resistant to reverse engineering and differential power analysis have broad application prospects. [0003] Numerical comparator...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K5/24
CPCH03K5/2481
Inventor 张跃军栾志存吴秋丰李立威
Owner NINGBO UNIV