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Accelerator control method and system based on programmable gate array FPGA

A technology of control method and control system, which is applied in the field of accelerator control method and system based on programmable gate array FPGA, can solve the problems of poor scalability, susceptibility to interference, and low precision of timing control, and achieve low interference, high scalability, The effect of high timing control accuracy

Active Publication Date: 2019-04-26
中国人民解放军96630部队 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The object of the present invention is to provide an accelerator control method and system based on a programmable gate array FPGA to solve the problems of low accuracy, susceptibility to interference, and poor scalability of existing timing control

Method used

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  • Accelerator control method and system based on programmable gate array FPGA
  • Accelerator control method and system based on programmable gate array FPGA
  • Accelerator control method and system based on programmable gate array FPGA

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Embodiment Construction

[0036] The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0037] On the one hand, the embodiment of the present invention discloses an accelerator control method based on a programmable gate array FPGA, which uses a field programmable gate array to control the trigger timing control circuit to receive synchronous signal input, magnetron trigger enable, electron gun trigger enable, high-voltage discharge , The timing of the ultra-low dose mode, to output the IGBT trigger signal, the electron gun trigger signal and the electron gun gun pressure mode control signal.

[0038] Field programmable gate array, FPGA (Field-Programmable GateArray), that is, field programmable gate array, is a product of further development on the basis of programmable devices such as PAL, GAL, and CPLD. It emerged as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only s...

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PUM

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Abstract

The embodiment of the invention discloses an accelerator control method and an accelerator control system based on a programmable gate array FPGA. The system comprises an output circuit; wherein the output circuit is in signal connection with an input circuit; an optical fiber triggering output circuit, wherein the optical fiber triggering output circuit is in signal connection with the output circuit; a power supply, wherein the power supply is in signal connection with the optical fiber triggering output circuit so as to provide variable voltage; a field programmable gate array circuit, wherein the field programmable gate array circuit is in signal connection with the optical fiber triggering output circuit so as to control triggering a time sequence control circuit to receive the time sequence of synchronous signal input, magnetron trigger enable, electron gun trigger enable, high-voltage discharge and ultra-low dose mode. The method has the advantages that the FPGA uses special logic processing hardware, the speed is high, and processing paths are parallel; the FPGA can be reconfigured, the same hardware can be reconstructed according to different tasks, and the flexibility ofthe using mode is nearly infinite; the FPGA can configure I / O quantity and function as required.

Description

technical field [0001] The invention relates to the technical field of accelerators, in particular to an accelerator control method and system based on a programmable gate array FPGA. Background technique [0002] The working mode of the accelerator is pulsed, and different timing triggers drive all parts of the functional components to work together. In the traditional accelerator, the timing trigger circuit is composed of discrete devices such as resistance capacitors and digital logic chips, which has low precision and is easily disturbed. Realize timing fine-tuning at the nanosecond level. And once the circuit is determined, new functions cannot be added. Contents of the invention [0003] The object of the present invention is to provide an accelerator control method and system based on a programmable gate array FPGA to solve the problems of low accuracy, susceptibility to interference and poor scalability of existing timing control. [0004] In order to achieve the...

Claims

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Application Information

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IPC IPC(8): G05B19/042
CPCG05B19/0423G05B2219/25257
Inventor 薛冰范潇王红召钟都都王冬张煜东史金倩李俊江叶青夏炎
Owner 中国人民解放军96630部队
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