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Real-time video stream analysis acceleration method, device and equipment

A technology of real-time video streaming and algorithm analysis, applied in closed-circuit television systems, character and pattern recognition, instruments, etc., can solve the problems of difficult number of concurrent channels, low decoding performance, high cost, etc., achieve minimum system delay and improve system performance Effect

Active Publication Date: 2019-05-03
武汉众智数字技术有限公司
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  • Summary
  • Abstract
  • Description
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AI Technical Summary

Problems solved by technology

[0003] However, when the intelligent analysis algorithm is faced with massive video processing scenarios, it faces huge performance pressure. Taking the most widely used 1080PH264 video stream as an example, the current mainstream intelXeon server based on x86 architecture usually only reaches about 200 based on CPU decoding. The performance of ~300fps, and the intelligent video analysis algorithm is usually a pipeline of video stream->decoding->YUV / RGB data->algorithm processing. After adding the algorithm link, since the image algorithm usually consumes a lot of CPU, the above decoding performance will be reduced. Lower, the specific performance is that it is difficult to increase the number of concurrent channels that can be supported by real-time video streams. If the performance is improved by horizontally expanding analysis nodes and adding analysis servers, the cost is too high and the price / performance ratio is too low, and it is difficult to support large-scale video. Analysis application scenarios

Method used

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  • Real-time video stream analysis acceleration method, device and equipment

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Embodiment 1

[0043] see figure 1 with figure 2 , the present embodiment provides a real-time video stream analysis acceleration method, comprising the following steps:

[0044]1) The algorithm analysis module sets two identical GPU caches for each GPU, respectively labeled No. 1 cache and No. 2 cache. Each cache can store up to M channels of decoded data, and has a flag inside, and A decoding channel value k, used to save the accumulated decoding channels. When the algorithm module is started, the flags of the two GPU caches are initialized to false; at the same time, it includes a data receiving interface, and each channel of decoded data can transfer the decoded data L to the algorithm analysis module by calling this interface.

[0045] A. When the double buffer flag is false, it means that the buffer is writable, and the multi-channel decoding data can be saved in the writable buffer;

[0046] B. When the double-buffer flag is true, it means that the cache is readable, and the saved...

Embodiment 2

[0067] This embodiment provides a real-time video stream analysis acceleration device, including a decoding data receiving module, a decoding module, a writing module, a buffer writing monitoring module, and a buffer reading monitoring module;

[0068] The decoded data accepting module is used to accept each channel of decoded data;

[0069] The writing module is used to check the corresponding cache flags to determine whether there is a writable cache, and when at least one cache flag is false, it means that there is a writable cache, and then randomly selects a flag to be false , store the decoded data of this path in the writable cache, and add 1 to the value k of the decoded path of the cache; otherwise, directly discard the decoded data of this path;

[0070] The cache write monitoring module is used to check the status of several caches every specified time. When the value k of the cached decoding path is greater than or equal to the set value K, the cache is considered ...

Embodiment 3

[0073] This embodiment provides a real-time video stream analysis acceleration device, including a memory for storing programs;

[0074] And a processor, the processor is configured to implement the steps of the above-mentioned real-time video stream analysis acceleration method when executing the program.

[0075] The present invention uses double buffering for real-time video (the frame rate is sent online and fixed, generally 25-30fps), emphasizing that it can support as many channels as possible (generally 10-30) under the premise of satisfying real-time performance . However, if there are too many paths, the data transmission and delay between the CPU and the GPU and between the GPU will become a big bottleneck. Therefore, double-buffer batch processing is designed to alleviate it.

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Abstract

The invention relates to a real-time video stream analysis acceleration method, a device and apparatus. The method aims at path number optimization and expansion of real-time video stream algorithm analysis, and the GPU is called to decode each path of real-time video, a decoding result is called back to the algorithm directly through a video memory address, double caches are set by an algorithm end, storing decoded data in multiple paths, transmitting the decoded data to the algorithm for GPU batch processing, and switching the two cache functions after batch processing is completed to achieve the purpose of minimum system delay.

Description

technical field [0001] The present invention relates to the technical field of video image processing, in particular to a real-time video stream analysis acceleration method, device and equipment. Background technique [0002] With the gradual advancement and implementation of large-scale security projects and projects such as "Safe City", "Smart City", and "Snow Bright Project", the construction of urban video surveillance has gradually entered an in-depth stage. While accumulating a large amount of video data, it has already Unsatisfied with the simple "watching" video stage: In the face of massive video scenes, the traditional manual inspection of video with the naked eye consumes a lot of manpower and material resources, but it often seems powerless and cannot adapt to the real case handling needs of the public security industry. Under this background, through intelligent video analysis algorithms, such as line detection, target tracking, face detection, etc., the video ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06K9/00H04N7/18
Inventor 谈鸿韬陆辉刘树惠杨波
Owner 武汉众智数字技术有限公司
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