The invention discloses a VLSI
system structure of a
JPEG image decoder and a realization method thereof. The VLSI
system structure mainly comprises an input FIFO module, a header code
stream analytic module, an entropy decoding module, a dequaztization module, an anti-zigzag conversion module, a inverse
discrete cosine transform module, a de-sampling module, a color
gamut conversion module and a display module. The entire design of the VLSI
system structure adopts the
assembly line design which can process multiple images simultaneously and continuously; the
huffman decoding in the entropy decoding module adopts the
modes of multibyte buffer and decoding
word length feedback, thus increasing the operational speed of a
huffman decoding module; to-be-decoded coefficient for counting and indicating is added in the inverse
discrete cosine transform module which combines module data end mark method so that only nonzero coefficient data can be inputted, the
data input cycle of single decoding module is greatly reduced, the decoding velocity is effectively increased, and the whole decoding speed is well improved.
Simulation tests show that by using the VLSI
system structure of the invention, 60fps of decoding effect can be realized under 800*600 resolution and 100MHz
clock frequency.