3D NAND storage and forming method thereof
A 3DNAND and memory technology, which is applied in the manufacture of electric solid-state devices, semiconductor devices, and semiconductor/solid-state devices, etc. It can solve the problems of poor sidewall morphology of gate separation grooves, and achieve the effect of improving the performance of the common source of the array.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 3
[0090] Figure 11-13 It is a schematic cross-sectional structure diagram of the formation process of the gate spacer of the 3D NAND memory according to another embodiment of the present invention. The difference between this embodiment and the foregoing embodiments lies in the specific structure of the isolation layer and the manner in which the etching rate for etching the intermediate isolation layer is consistent with the etching rate for etching the first stack structure and the second stack structure. It should be noted that, for descriptions or limitations of the same or similar structures in this embodiment as in the foregoing embodiments, please refer to the descriptions or limitations of corresponding parts in the foregoing embodiments, and details are not repeated in this embodiment.
[0091] In one embodiment, please refer to Figure 11 and Figure 12 , during etching, the method for keeping the etching rate of the intermediate isolation layer consistent with the ...
PUM
Abstract
Description
Claims
Application Information
- R&D Engineer
- R&D Manager
- IP Professional
- Industry Leading Data Capabilities
- Powerful AI technology
- Patent DNA Extraction
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com