3d NAND memory and its formation method

Abstract

A 3D NAND memory and a forming method thereof, wherein the forming method of the 3D NAND memory consists of forming an intermediate isolation layer between a first stacked structure and a second stacked structure, and sequentially etching the second stacked structure, the middle The isolation layer and the first stacked structure, when forming the gate isolation trench in the second stacked structure, the intermediate isolation layer and the first stacked structure, the intermediate isolation layer is used to make the etching rate of the intermediate isolation layer equal to the etching rate. The etching rate of the first stacked structure remains consistent, and the etching rate of the second stacked structure remains consistent with the etching rate of the first stacked structure, thereby preventing the etching rate of the intermediate insulating layer from being the same as the etching rate of the first stacked structure. When the etching rate is different from that of the second stacked structure, bending defects occur in the sidewalls of the gate trenches.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a 3D NAND memory and a forming method thereof. Background technique [0002] NAND flash memory is a better storage device than hard disk drives, and it has been widely used in electronic products as people pursue non-volatile storage products with low power consumption, light weight and high performance. At present, the NAND flash memory with a planar structure is close to the limit of practical expansion. In order to further increase the storage capacity and reduce the storage cost per bit, a 3D NAND memory with a 3D structure is proposed. [0003] The manufacturing process of the existing 3D NAND memory includes: providing a substrate on which a stacked structure in which isolation layers and sacrificial layers are alternately stacked; etching the stacked structure to form an exposed substrate surface in the stacked structure channel hole; form a storage structure in...

AI Technical Summary

Problems solved by technology

[0004] In order to further increase the storage capacity, the prior art usually forms a multi-layer stack structure when forming the stack structure, and each layer stack structure includes several alternately stacked isolation layers and sacrificial layers, and the stacking of adjacent layers A thick silicon oxide layer is formed between the structures, and by etching the multilayer stacked structure and the thick silicon oxide layer between the stacked structures, a gate spacer that exposes the surface of the substrate is formed, but the sidewall of the gate spacer poor shape

Images