A Configurable Structure for Optoelectronic Chip Testing

Abstract

The invention discloses a configurable structure for testing an optoelectronic chip. The configurable structure comprises a carrier plate (1), a joint (2) and a high-frequency circuit board (3), wherein the carrier plate (1) comprises a substrate plane (11), a chip plane (12), a chip fixing frame (13) and two fixed seats (14); the two ends of the substrate plane (11) in the length direction are provided with limiting devices (111); the two ends of the chip plane (12) in the length direction are provided with sliding grooves (121); the chip fixing frame (13) is in a long strip shape; the two ends of the chip fixing frame (13) in the length direction are arranged in the sliding grooves (121) respectively; the two fixed seats (14) are arranged at the end parts of the substrate plane (11) in the length direction; the joint (2) comprises a plurality of insulators (21) and two fixed heads (22); the fixed heads (22) are used in cooperation with the fixed seats (14); and the high-frequency circuit board (3) is arranged on the substrate plane (11), and comprises a circuit heat sink (31), a thin film circuit (32) and a plurality of conductive columns (33). The configurable structure has theadvantages of being detachable, short in manufacturing period, low in cost, wide in suitability and the like.

Description

technical field [0001] The invention relates to the technical field of optoelectronic chips, in particular to a configurable structure for optoelectronic chip testing. Background technique [0002] When testing optoelectronic chips, the traditional method is to use gold wire bonding and gold-tin solder for welding and fixing. Although the reliability is strong, it is highly targeted for chips and high-frequency circuits, and the installation process is cumbersome and cannot be reused. It takes a long time and the cost is high. For optoelectronic chips and high-frequency circuits with different lengths and repeated use of the test environment, the traditional test structure obviously cannot meet the requirements. Contents of the invention [0003] (1) Technical problems to be solved [0004] In view of the above technical problems, the present invention provides a configurable structure for optoelectronic chip testing, which has the advantages of detachable assembly, short...

AI Technical Summary

Problems solved by technology

[0002] When testing optoelectronic chips, the traditional method is to use gold wire bonding and gold-tin solder for welding and fixing. Although the reliability is strong, it is highly targeted for chips and high-frequency circuits, and the installation process is cumbersome and cannot be reused. It takes a long time and costs high. For optoelectronic chips and high-frequency circuits with different lengths, the test environment needs to be reused many times. The traditional test structure obviously cannot meet the requirements.

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