Sorting for data-parallel computing devices

Abstract

Aspects of the disclosure relate to determining relevant content in response to a request for information. One or more computing devices (170) may load data elements into registers (385A-385B), wherein each register is associated with at least one parallel processor in a group of parallel processors (380A-380B). For each of the parallel processors, the data elements loaded in its associated registers may be sorted, in parallel, in descending order. The sorted data elements, for each of the parallel processors, may be merged with the sorted data elements of other processors in the group. The merged and sorted data elements may be transposed and stored.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of the filing date of U.S. Provisional Patent Application Serial No. 62 / 421,544, filed November 14, 2016, the disclosure of which is incorporated herein by reference. Background technique [0003] The ability to quickly and efficiently sort data is critical to many operations of computing devices. For example, many applications (such as search, data query processing, graphics, sparse linear algebra, machine learning, etc.) require substantially real-time data sorting. Many sorting methods rely on a single-threaded CPU to execute sequential sorting algorithms. This method of sorting is time consuming and requires significant processing resources. [0004] Recent improvements in sorting methods include semi-parallel and parallel algorithms executed by data-parallel devices such as graphics processing units (GPUs). However, these semi-parallel and parallel algorithms suffer from many d...

AI Technical Summary

Problems solved by technology

However, these semi-parallel and parallel algorithms suffer from many drawbacks, as they often cannot fully utilize the computational power of the data-parallel device and reach peak throughput until the number of values ​​to be sorted becomes so large that it fills the bandwidth of the data-parallel device

Furthermore, these semi-parallel algorithms often exhibit significant branch divergence, where adjacent processing elements do not execute the same instructions, preventing data-parallel devices from becoming fully computationally constrained

Processing smaller sets of data elements is also inefficient because the data parallel device may stall while waiting for data to be loaded or stored

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