Oscillator arrangement and method for synchronizing an oscillator

Abstract

The invention discloses an oscillator arrangement and method for synchronizing an oscillator. The oscillator arrangement having an oscillator configured to generate an oscillation signal having two half-cycles, an input configured to receive a synchronization signal including synchronization triggers, a synchronizer configured to reject a synchronization trigger received during a first part of a half-cycle and to synchronize the oscillator to a synchronization trigger received during a second part of the half-cycle, and a controller configured to prolong the second part of the half-cycle in response to receiving a synchronization trigger during the first part of the half-cycle.

Description

Technical field [0001] The present disclosure relates to oscillator devices and methods for synchronizing oscillators. Background technique [0002] Phase-locked loop (PLL) devices are generally used in applications where a periodic signal that must be synchronized with a reference signal must be generated. The PLL consists of a variable frequency oscillator in which the frequency is adjusted by means of phase comparison to lock on the phase of the reference signal. Depending on both the phase and frequency difference between the PLL oscillator and the reference signal, the phase locking operation may take several cycles. Therefore, if the reference signal is not continuously available, but appears from time to time and even for several cycles, the phase locking operation becomes a problem. In fact, in this case, the possibly considerable phase error should be corrected in a few cycles. The application scenario is even worse when the reference voltage may disappear while remai...

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Problems solved by technology

In extreme cases like this, a regular PLL simply won't work

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