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Data read-write synchronization circuit and data read-write method

A technology of data reading, writing and synchronizing circuits, applied in the direction of generating/distributing signals, etc., can solve problems such as erroneous data and system errors, and achieve the effect of reliable transmission and avoidance of erroneous data

Active Publication Date: 2019-07-23
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When the setup time or hold time is insufficient, metastable values ​​will be generated, erroneous data will appear, which will lead to errors in the whole system

Method used

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  • Data read-write synchronization circuit and data read-write method
  • Data read-write synchronization circuit and data read-write method
  • Data read-write synchronization circuit and data read-write method

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Embodiment Construction

[0018] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0019] see Figure 1 to Figure 2 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arb...

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PUM

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Abstract

The invention provides a data read-write synchronization circuit and a data read-write method, and the method comprises the steps: setting a high REQ _ T pulse signal as a TCLK clock signal period, and enabling a fifth D trigger to output a high-level signal; synchronizing the high-level signal through an RCLK clock signal clock domain and then outputting an REQ _ R signal; when the REQ _ R signalis raised, enabling the clock domain of the RCLK clock signal to read data; after the clock domain of the RCLK clock signal finishes reading the data, enabling the ACK _ R pulse signal to be high; and clearing the signal in the fifth D trigger, changing the ACK _ T signal into a low level, and completing data reading and writing. The control signal in the data read-write synchronization circuit is latched by the D trigger and the reset register, the data sending end sends a request, and the receiving end is cleared, so that the data read-write synchronization circuit is particularly suitablefor the data sending end to enter a latch mode, non-waiting processing is realized, wrong data is avoided, and reliable transmission of the data is ensured.

Description

technical field [0001] The invention relates to the field of integrated circuit design, in particular to a data read-write synchronous circuit and a data read-write method. Background technique [0002] In the field of digital circuit design, data transmission scenarios across clock domains often occur, and data needs to interact in two or more clock domains. Since in a multi-clock domain system, data transmission across clock domains is unavoidable, and because the operating edge relationship of the clocks between different clock domains is uncertain, data is transmitted from one clock domain to another. , there may be insufficient setup or hold times. When the setup time or hold time is insufficient, metastable values ​​will be generated, erroneous data will appear, and the whole system will go wrong. [0003] Therefore, it is necessary to propose a new synchronous circuit for reading and writing data to solve the above problems. Contents of the invention [0004] In ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/12
CPCG06F1/12Y02D10/00
Inventor 赵锋
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP