A closed-loop multi-level anti-single event flipping effect storage system and implementation method

An anti-single particle and storage system technology, applied in the field of environmental anti-irradiation, can solve problems such as single error correction method, one-sided error correction object, error correction path, open loop, etc., to achieve comprehensive error correction methods, fast operation speed, and increased effect of effectiveness

Active Publication Date: 2022-07-29
BEIJING RES INST OF TELEMETRY +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, these methods often have problems such as single error correction methods, one-sided error correction objects, and open-loop error correction paths. There is still room for further improvement in the effect of its anti-single event flipping effect.

Method used

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  • A closed-loop multi-level anti-single event flipping effect storage system and implementation method
  • A closed-loop multi-level anti-single event flipping effect storage system and implementation method
  • A closed-loop multi-level anti-single event flipping effect storage system and implementation method

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Embodiment Construction

[0053] The present invention will be further described below in conjunction with the accompanying drawings.

[0054] like figure 1 As shown, the present invention proposes a closed-loop multi-level anti-single event flip effect storage system based on FPGA, including a CPU, an FPGA and a memory; the CPU is not directly connected to the memory. The CPU sends a read or write memory instruction to the FPGA. After the FPGA parses successfully, it respectively executes the operation of reading data from the corresponding address of the memory and writing it to the CPU or reading data from the corresponding address space of the CPU and writing it to the memory.

[0055] like figure 2 Shown is the working flow chart of a closed-loop multi-level anti-single-event flip effect storage system based on FPGA of the present invention. Before the system runs, the storage space of the memory is allocated three non-connected modulo address spaces A and B according to the same functional area...

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Abstract

The invention discloses a closed-loop multi-level anti-single-event overturning effect storage system, comprising a CPU, an FPGA and a memory. The CPU sends a memory read instruction or a memory write instruction to the FPGA, and the FPGA parses the received instructions. The operation of reading data from the corresponding address of the memory and writing it to the CPU or reading data from the corresponding address space of the CPU and writing it to the memory. At the same time, the invention discloses an implementation method of the storage system. In the present invention, the data inflow and outflow channel error correction paths between the CPU, the FPGA and the memory are closed loop, the data operation path is short, the operation speed is fast, and the FPGA program is implemented with three-mode redundancy, which ensures that even if the three sets of data written into the memory are all wrong, the It can be corrected back, effectively improving the ability of the storage system to resist single-event flipping.

Description

technical field [0001] The invention belongs to the technical field of environmental anti-radiation, in particular to a closed-loop multi-level anti-single-event overturning effect storage system based on FPGA and an implementation method. Background technique [0002] When space high-energy particles are injected into the sensitive area of ​​a semiconductor device, the phenomenon of device logic state inversion, that is, single-particle inversion, often occurs. With the increase of the integration scale of semiconductor chips, the probability of single-event flipping of semiconductor devices in complex electromagnetic environments is increasing. When the logic state of the device is flipped, it will cause the system operating state to change, and it will cause catastrophic consequences such as casualties and mission failures. [0003] The current methods for resisting single event effects of memory mainly include two aspects: process and design. The use of a special anti-...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F3/06G06F11/10
CPCG06F3/0644G06F3/0631G06F11/1004G06F11/1032
Inventor 郗洪柱郑义钟亮郑林蒙瑰刘蓓徐暠周建发史青彭泳卿
Owner BEIJING RES INST OF TELEMETRY
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