IMD test structure and semiconductor device

Abstract

The invention provides an IMD test structure and a semiconductor device. The IMD test structure comprises a dielectric layer, and a group including two opposite upper test boards, two opposite lower test boards and a through hole array which are located in the dielectric layer. The upper test boards are electrically connected to a plurality of upper conductive strips extending in a row direction and interpenetrated with each other. A plurality of lower conductive strips extending in the row direction and including at least two sub-conductive strips are arranged between the lower test boards. The sub-conductive strips electrically connected to the two lower test boards are interpenetrated. A plurality of first through holes in a first through hole row are connected to a sub-conductive strips. A plurality of second through holes in a second through hole row are connected to a sub-conductive strip and the upper conductive strip thereon. The at least two sub-conductive strips increases thecircumference of each lower conductive strip, can reduce the number of tests when the total circumference of the test is ensured, and greatly increases the test efficiency. The spacing between the sub-conductive strips can be designed to be short very much in order to evaluate the IMD performance between the conductive strips or between the through holes and improve test sensitivity.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to an IMD test structure and a semiconductor device. Background technique [0002] Low-k (low dielectric constant) material (k<3.0) can produce lower capacitance value (C) due to its inherent low dielectric constant, so it has been widely used in the field of semiconductor manufacturing, such as filling in Dielectric layer material between metal layers (including interconnects and vias). Therefore, in the BEOL (Back End Of Line, back-end process), the dielectric layer made of Low-k material (such as the dielectric layer between the interconnection line, the dielectric layer between the interconnection line and the through hole, the through hole and the through hole The dielectric layer between the through holes, etc.), its breakdown voltage (Vbd, breakdown voltage) will be significantly reduced, especially its TDDB (Time Dependent Dielectric Breakdown, dielec...

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Problems solved by technology

[0004] When the IMD test of the via to via IMD test structure is carried out, it is required that the spacing between the adjacent lower metal layers of the IMD test structure must be very small (for example, less than 0.1 μm), and the multiple tested The total perimeter of the IMD test structure is greater than a threshold (for example, 1 mm), but when the design size difference between the upper metal layer and the lower metal layer is large, in order to ensure that the spacing between the lower metal layers is smaller, it is necessary The width of the lower metal layer is increased, the girth of this IMD test structure is very small, and a large number of IMD test structures need to be tested to ensure that the total girth is greater than the threshold, the test efficiency is very low, and, due to the lower metal layer The width dimension is widened, and the width of the dielectric layer between the vias is also widened, and the dielectric breakdown characteristics between the vias cannot be effectively evaluated.

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