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A mram readout circuit

A technology for reading out circuits and calibrating circuits, used in information storage, static memory, digital memory information, etc.

Active Publication Date: 2021-04-27
SHANGHAI CIYU INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When measuring the resistance of a memory cell, direct current is unavoidable, and the power consumption of this readout circuit accounts for most of the MRAM read power consumption.

Method used

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Embodiment Construction

[0031] The preferred embodiments of the present invention are described in detail below, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so as to define the protection scope of the present invention more clearly.

[0032] Such as Figure 5 As shown, an MRAM readout circuit includes a resistance reference unit composed of a PMOS transistor P and a capacitor C, a selection switch group K1, a switch K2, a comparator and a calibration circuit.

[0033] The capacitor C of the resistance reference unit is connected between the source and the gate of the PMOS transistor P, and the capacitor C is used to maintain the gate voltage of the PMOS transistor P to stabilize the resistance value.

[0034] The drain of the PMOS transistor P is connected to the selection switch group K1, and the other end of the selection switch group K1 is connected to the read memory unit and the input terminal of the comparator according...

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PUM

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Abstract

The invention discloses an MRAM readout circuit, which includes a resistance reference unit composed of a PMOS transistor P and a capacitor C, a selection switch group K1, a switch K2, a comparator and a calibration circuit. When performing a read operation, the selection switch group K1 is connected to the drain of the PMOS transistor P, the read memory unit and the input end of the comparator, and a voltage Vb is respectively applied to both ends of the read memory unit and the resistance reference unit. and Vb+V_read; the other input of the comparator is the reference voltage V_ref, and the comparator outputs the read result. The invention uses a PMOS tube as a resistance reference for reading operation, adjusts the gate voltage of the PMOS tube through a calibration circuit to make the resistance accurate, and greatly reduces the occupied chip area. In addition, low-voltage V_read (300‑400mV) is used for read operation, which greatly reduces the read power consumption.

Description

technical field [0001] The invention belongs to the field of semiconductor chip memory, in particular to an MRAM readout circuit. Background technique [0002] Magnetic Random Access Memory (MRAM) is an emerging non-volatile storage technology. It has high-speed read and write speed and high integration, and can be rewritten infinitely. MRAM can be read and written as fast as SRAM / DRAM, and can permanently retain data after power failure like Flash memory. [0003] MRAM has very good economy and performance. Its silicon chip area occupied per unit capacity has great advantages over SRAM, and also has advantages over NOR Flash, which is often used in such chips, and has greater advantages than embedded NOR Flash. . The MRAM read and write delay is close to the best SRAM, and the power consumption is the best among various memory and storage technologies; and MRAM is compatible with standard CMOS semiconductor processes, while DRAM and Flash are not compatible with standard...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/16
CPCG11C11/1673
Inventor 戴瑾
Owner SHANGHAI CIYU INFORMATION TECH CO LTD