A mram readout circuit
A technology for reading out circuits and calibrating circuits, used in information storage, static memory, digital memory information, etc.
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[0031] The preferred embodiments of the present invention are described in detail below, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so as to define the protection scope of the present invention more clearly.
[0032] Such as Figure 5 As shown, an MRAM readout circuit includes a resistance reference unit composed of a PMOS transistor P and a capacitor C, a selection switch group K1, a switch K2, a comparator and a calibration circuit.
[0033] The capacitor C of the resistance reference unit is connected between the source and the gate of the PMOS transistor P, and the capacitor C is used to maintain the gate voltage of the PMOS transistor P to stabilize the resistance value.
[0034] The drain of the PMOS transistor P is connected to the selection switch group K1, and the other end of the selection switch group K1 is connected to the read memory unit and the input terminal of the comparator according...
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