Configurable universal convolutional neural network accelerator

A convolutional neural network and accelerator technology, applied in the field of general-purpose convolutional neural network accelerators, can solve the problems that the acceleration effect of the network structure is not ideal and cannot adapt to the application requirements of the variable neural network structure, and achieve the effect of high data throughput rate

Active Publication Date: 2019-10-29
SOUTHEAST UNIV
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Problems solved by technology

[0006] The purpose of the present invention is to address the deficiencies of the above-mentioned background technology and provide a configurable general-purpose convolutional neural network accelerator. By configuring network parameters, the acceleration of convolutional neural network structures of various scales is realized, and neural networks with different structures Using different d

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  • Configurable universal convolutional neural network accelerator
  • Configurable universal convolutional neural network accelerator

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Embodiment Construction

[0022] The technical solution of the invention will be described in detail below in conjunction with the accompanying drawings.

[0023] The configurable general-purpose convolutional neural network accelerator designed by the present invention is as figure 1 As shown, the size of the two PE arrays is 14*16, the size of the convolution kernel is 3*3, the step size of the convolution kernel is 1, the size of the input feature map is 15*15 (after adding padding), and a single batch of input channels The number is 14, the number of output channels in a single batch is 32, and the data multiplexing mode is output multiplexing as an example to describe its working method in detail.

[0024] After the accelerator in the waiting state receives the start signal. The accelerator reads the network parameters from the external memory through the bus interface, updates the network parameter register, and determines the data reuse mode and the switching sequence of the working state accor...

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Abstract

The invention discloses a configurable universal convolutional neural network accelerator, and belongs to the technical field of calculation, calculation and counting. The accelerator comprises a PE array, a state controller, a function module, a weight cache region, a feature map cache region, an output cache region and a register stack; the state controller comprises a network parameter registerand a working state controller. An excellent acceleration effect can be achieved for networks of different scales by configuring a network parameter register, and a working state controller controlsswitching of the working state of the accelerator and sends a control signal to other modules. The weight cache region, the feature map cache region and the output cache region are each composed of aplurality of data sub-cache regions and used for storing weight data, feature map data and calculation results. According to the method, proper data reuse modes, array sizes and the number of sub-cache regions can be configured according to different network characteristics, and the method is good in universality, low in power consumption and high in throughput.

Description

technical field [0001] The invention discloses a configurable universal convolutional neural network accelerator, which belongs to the technical field of calculation, calculation and counting. Background technique [0002] In recent years, deep neural networks have developed faster and been widely used, and have achieved remarkable results in text recognition, image recognition, target tracking, face detection and recognition and other application fields. The scale of the deep neural network continues to increase as the application scenarios become more complex, and a large number of parameters need to be stored and calculated. Therefore, how to accelerate and implement large-scale deep neural networks on hardware has become an important issue in the field of machine learning. [0003] GPU (Graphic Processing Unit, graphics processing unit) and multi-core CPU (Central Processing Unit, central processing unit) are commonly used devices to accelerate large-scale deep neural n...

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Application Information

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IPC IPC(8): G06N3/04G06N3/063G06T1/20G06T1/60
CPCG06N3/063G06T1/20G06T1/60G06N3/045
Inventor 陆生礼庞伟舒程昊刘昊范雪梅苏晶晶
Owner SOUTHEAST UNIV
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