59 results about "Data reuse" patented technology

The invention relates to a lightweight reasoning acceleration architecture based on an instruction set architecture, and the architecture comprises the steps: initializing hardware level configuration, building a software level environment, and constructing a basic operation environment of the lightweight reasoning acceleration architecture; a model analysis mode is adopted to reduce the memory demand and carry out allocation optimization on the memory, and a reasoning execution basis is constructed; completing calculation parameter configuration by adopting modes of accelerator parameter configuration, weight data preloading and output data loading; based on the calculation task and monitoring information of the calculation process, calculation resources are dynamically scheduled, and efficient scheduling and execution of the calculation task are achieved. The energy efficiency is improved based on a data reuse strategy, memory access optimization and power consumption management; a comprehensive anomaly detection system is constructed, and anomaly conditions are detected and reported; the collaborative optimization of reducing the power consumption and improving the calculation efficiency is achieved, the real-time performance and the stability are both considered, and the efficient and reliable lightweight reasoning effect is achieved in the edge calculation scene.

The invention discloses a data customization production delivery method and system based on a block chain and cloud, and relates to the technical field of data processing and information security, and the method comprises the steps that a data customization party and a production party register and bind a public chain address in the system; deploying an intelligent contract with an automatic fund transfer function on a public chain based on the transaction demand; the customization party prepares a production environment, including creating a production cloud container and a cloud database, and generating an asymmetric key pair; the producer completes data production in the isolated cloud container, encrypts the whole-process data by using the public key of the customizing party and stores the encrypted data into the private block chain; and the system then starts an independent data verification container, decrypts the data by using a built-in private key, carries out integrity comparison and quality verification, and automatically triggers an intelligent contract to carry out settlement according to a verification result. The problems that the data is easy to reuse, the ownership is unclear and the settlement efficiency is low in data customization production are effectively solved, and safe, credible and efficient data production and delivery are realized.

This invention discloses a tactical competitive data interaction method and system based on an offline physical battlefield, relating to the field of offline real-world entertainment and multi-platform client linkage technology. The method includes: players registering and binding their accounts via any mainstream mini-program or H5 client such as WeChat, Alipay, Douyin, Meituan, and Xiaohongshu; setting up minefields (including proprietary toy mines), wearable smart equipment (including smart helmets, smart vests, and smart toy guns), escape room puzzle areas, and withdrawal points on the offline physical battlefield; anti-theft tags embedded in items on the battlefield and in the minefield; and an alarm sounding when a player dies without leaving with all items; collecting player offline behavior data and synchronizing it to the server; unified settlement at the cashier, with data synchronized to various mini-programs and H5 clients; enabling data reuse, online virtual auctions for offline redemption, and lottery activities; and the system including an offline physical terminal, multi-platform clients, and a server, with the server handling data processing, algorithm calculations, and anti-theft management. This invention solves the problems of existing offline tactical competitive experiences being monotonous, inefficient in operation, prone to item loss, and insufficient online-offline linkage, enhancing player immersion and stickiness, forming a unique technological barrier, and facilitating lightweight promotion.

This invention discloses a computing power multiplication pre-storage system, method, and embedded device, belonging to the field of computing architecture and data reuse technology. Addressing the problems of redundant repetitive computation, conflict risks and irreparable damage in data integrity verification, and inefficient request-response modes in existing technologies, this invention proposes a closed-loop "pre-storage-reuse-verification" system. The system includes: a hotspot identification and adaptive pre-storage module, used to identify high-frequency computing tasks, dynamically adjust the pre-storage range, and automatically eliminate low-frequency data, achieving self-evolution and convergence of the data set; a multi-level trusted caching module, adopting a layered storage architecture to achieve layered management of data value, and possessing automatic backfilling between layers, periodic consistency verification, and automatic repair mechanisms; a mathematically based integrity verification module, configuring corresponding differential or recursive verification logic for a wide range of computing tasks, from basic data types and various mathematical functions to operational operators, providing a zero-conflict, reversible, and repairable lightweight data verification and restoration method; and an asynchronous push processing engine, which immediately returns after receiving a request, submitting the computing task to a background lock-free queue for batch processing, achieving decoupling between computation and requests. This invention pioneers the deep integration of differential verification and computation acceleration, reconstructing the traditional "request-computation-response" logic into a "pre-store-query-retrieve" push-pull interaction logic. By reusing repeated calculations through module collaboration, it not only significantly reduces computation latency, but more importantly, it improves the effective utilization of computing power, greatly saves hardware resources and energy consumption, and ensures data credibility and integrity. It is applicable to fields such as artificial intelligence, scientific computing, engineering simulation, financial technology, and video processing.

The application provides a bank risk control model data sharing method and system, the method comprises the following steps: when a bank risk control model needs to register a public data table, configuring the public data table according to the bank risk control model, and configuring parameters of the bank risk control model; the public data table comprises data shared among the bank risk control models; when the bank risk control model is executed, reading and writing data in the public data table according to the configuration of the public data table, and calling the data in the public data table according to a calling rule. The method guarantees the consistency of the data, reduces the design work of data reuse logic among the bank risk control models, and improves the data sharing capability.

The invention provides a numerical control planer type milling machine multi-axis linkage track optimization system, belongs to the technical field of numerical control planer type milling machine multi-axis linkage machining, and aims at solving the problems that an existing system is poor in track adaptability, insufficient in inter-axis synchronization, single in optimization dimension and complex in operation. The system comprises a data acquisition module, a trajectory planning module, a trajectory optimization module, an execution control module, a state monitoring module, a parameter storage module, a multi-axis cooperative compensation module and a man-machine interaction module, and all the modules are in closed-loop signal linkage. The data acquisition module acquires full-dimensional basic parameters, the trajectory planning module adapts to machining precision through NURBS interpolation, the trajectory optimization module gives consideration to precision, efficiency and inter-axis impact degree through multi-objective optimization, the multi-axis cooperative compensation module corrects errors in real time, and the parameter storage module achieves data reuse. The multi-axis linkage machining precision and stability can be improved, the operation threshold is lowered, and the multi-axis linkage machining method is suitable for high-precision complex workpiece machining.

This invention relates to the field of artificial intelligence processing, specifically to a method for generating non-functional interactive personalized random input, comprising the following steps: S1, basic data collection; S2, personalized random input generation; S3, output of generated content and reception of interactive feedback; S4, emotional feature fusion and extraction, obtaining surface emotional features and scene emotional features and performing emotional feature fusion; S5, lightweight emotional classification and multimodal response scheduling; S6, emotional response output, simultaneously outputting text, emoticons, and voice resources to the user; S7, quantitative analysis of user interaction willingness; S8, dynamic threshold iteration and adjustment of interaction intensity; S9, cross-stage data reuse and full-link reverse iteration, solving the problems of insufficient content generation adaptability, insufficient accuracy and real-time performance of emotional responses, and inefficient interaction links and adjustment mechanisms in traditional technologies in terms of underlying algorithms, model architecture, and technical mechanisms.

A power amount control device (10) has a storage unit (180) that stores situation information as training data (550). The power amount control device (10) also comprises a training data reuse unit (161) that, if new situation information including an unencountered outside air temperature range that is not stored as the training data (550) is generated in an operation stage, identifies situation information having the same in-room initial temperature level, load arrangement pattern, and air-conditioning control level in an outside air temperature range closest to the outside air temperature of the unencountered outside air temperature range, reuses an air-conditioning power function and a temperature function indicated by the identified situation information, and sets the air-conditioning control level indicated by the identified situation information to the new situation information after a prescribed adjustment process has been carried out.

The present application relates to the field of scientific computing and GPU technology, and particularly relates to a GPU scan path optimization method.The method comprises: constructing a three-dimensional Stencil calculation GPU framework based on an optimal scan traversal path; based on the three-dimensional Stencil calculation GPU framework, constructing a scan traversal path mathematical model, abstracting the scan traversal path into an integer programming problem, taking the total memory access amount as an optimization target, and optimizing to obtain an optimal two-dimensional window scan traversal path.Compared with the traditional direct calculation, the method of the present application can significantly reduce the data transfer in the global memory, improve the utilization rate of the accessed data, i.e., improve the data reuse rate, reduce the invalid waiting caused by the data blocking and high memory delay of the calculation unit, and thus improve the calculation efficiency.

Aspects of this technical solution can increase processing speed in low-latency applications while maintaining the integrity of image feature recognition at these higher speeds. For example, in image processing environments associated with autonomous navigation (e.g., driving), a large amount of image data must be processed quickly and accurately to maintain the reliability and timeliness of the physical environment. For example, embodiments according to this disclosure can provide powerful and accurate image feature recognition of input frame data that exceeds the capabilities of CPU processing or general-purpose GPU processing.

The invention discloses a sparse matrix vector multiplication-oriented hardware accelerator, sparse matrix vector multiplication-oriented hardware accelerator equipment and an application method, and the hardware accelerator comprises an off-chip storage system, an on-chip network used for carrying out data exchange routing, and an on-chip processing system used for executing access and multiplication calculation and matrix in-row element merging, the off-chip storage system comprises HBM channels used for storing five types of data of a column index, a row index, a vector value, a matrix value and a result vector, each HBM channel comprises an HBM stack and a memory controller, and the HBM channels used for storing the vector values are connected with an on-chip network through second-level caches. And the other HBM channels are directly connected with the on-chip processing system. The method aims at improving on-chip data reuse of the hardware accelerator for sparse matrix vector multiplication, reducing off-chip memory access times and improving performance and energy efficiency performance of the hardware accelerator.

This invention discloses a binary weighted convolutional neural network accelerator and a RISC-V system-on-a-chip. The binary weighted convolutional neural network accelerator includes an instruction parsing module, an address generation module, a finite state machine, a shift window module, a feature map storage module, a weight storage module, a multi-channel shared computing array, an accumulation module, and batch normalization and pooling modules. The RISC-V system-on-a-chip includes a FLASH module, a DDR module, an E203 RISC-V soft core module, an AXI Interconnect module, an AXI data transmission path, a cross-clock domain module, and the binary weighted convolutional neural network accelerator. This invention can significantly improve data reuse and storage retrieval efficiency, reduce resource consumption, and thus improve the overall operating efficiency of the accelerator.

According to the hardware-network collaborative optimization FPGA digital recognition system and method, the LeNet-5 network architecture is improved, the number of channels is adjusted to be a multiple of 4 so as to be matched with an FPGA parallel computing array, a ReLU activation function is adopted to replace traditional Sigmoid / Tanh, and 8-bit integer quantization processing is implemented; a four-level assembly line architecture (convolution-quantization-pooling-activation) is adopted in the aspect of hardware, a snakelike movement strategy and a double-Block dynamic storage scheme are combined, the energy efficiency ratio and the reasoning speed are remarkably improved while high recognition precision is kept, an end-to-end real-time processing function chain from image collection, neural network reasoning to result display is achieved, and the method has the advantages of being high in recognition precision and high in practicability. The data reuse rate is obviously improved, the storage access bandwidth is reduced, a referenceable low-power-consumption and high-performance solution is provided for edge computing applications such as intelligent monitoring and industrial quality inspection, and high real-time performance and practicability are achieved.

This application relates to the field of CNC machine tool servo control technology, and particularly to a method, apparatus, device, medium, and program product for generating machine tool servo parameters. The method includes: acquiring parameter data of the machine tool servo system to be optimized; calculating the actual distortion error value between the input trajectory data and the actual output trajectory data of the machine tool servo system to be optimized based on the parameter data; determining the speed loop proportional gain value and / or speed loop integral gain value of the machine tool servo system to be optimized based on the actual distortion error value, and controlling the machine tool servo system to be optimized to operate according to the speed loop proportional gain value and / or speed loop integral gain value. This solves the problems in related technologies, such as long trial cycles and high costs leading to low equipment utilization; reliance on experience leading to local optima; lack of trajectory spectrum adaptation analysis, requiring readjustment of new trajectories and difficulty in data reuse; and the lack of a quantitative relationship between parameters and contour errors, making it difficult to guide optimization and cross-device adaptation.

The invention relates to the technical field of computer systems, and provides a fine-grained quantization matrix multiplication device and method based on a systolic array, and the device comprises an input scheduling module which is used for receiving input matrix data and corresponding quantization factor data, and adding type identifiers to the input matrix data and the quantization factor data; the systolic array is formed by connecting a plurality of processing units in a two-dimensional net structure, and each processing unit is used for selectively executing multiply-accumulate operation or inverse quantization operation according to the data received at the upstream and the type identifier of the data; wherein the input scheduling module is used for scheduling data added with a type identifier to a systolic array according to rows and columns; and the output module is used for receiving and outputting a calculation result calculated by the systolic array. The problems that quantization factor insertion is low in efficiency, inverse quantization is separated from calculation flow and task switching overhead is large are solved, and the data reuse rate, the calculation efficiency and the overall energy efficiency ratio of the systolic array in a fine-grained quantization scene are remarkably improved.

The invention provides a memory access optimization device for a convolutional neural network accelerator, and belongs to the technical field of integrated circuit design, the memory access optimization device comprises a pulsation processing unit array which is used as a computing core, adopts a regular two-dimensional grid structure and comprises processing units, and each processing unit is provided with a basic multiplication and addition operation unit and a local register; the ifmaps second-level cache system adapts to locality of convolution operation through hierarchical scheduling, the reuse rate of an input feature map is improved, and redundant memory access is reduced; and a part of the sum register file is directly connected with the pulse processing unit array and is used for caching a part of the sum register file and an intermediate result generated in the calculation process. According to the method, a hierarchical data multiplexing system is established, so that the data multiplexing efficiency of the input feature map and the partial sum is remarkably improved on the premise of not excessively increasing the hardware complexity, and the storage access frequency and the system power consumption are effectively reduced.

Retrieving data blocks from a memory cache on a processor unit to be used by more than one compute thread can be improved to increase data reuse and reduce power consumption. Conventionally, data blocks are retrieved using a standard data retrieval model regardless of how the data is reused by the multiple compute threads accessing that data. By dynamically using a combination of dataflow retrieval models, a more optimized process can be implemented increasing data reuse and lowering power consumption of the processor unit. The dataflow retrieval models can be adaptive swizzling, continuous rasterization, alternating k-order, periodic compute thread array synchronization, or explicit tile eviction. As the size and number of memory caches increase on a processing unit, as well as the number of logic units and streaming multiprocessors, these optimizations become more valuable to overall efficiency.

The present application relates to the technical field of neural network optimization, and more particularly to a dynamic cross-layer data multiplexing method for efficient deep convolution calculation, comprising: step 1, designing a single-layer block optimization and loop sequence optimization model; step 2, performing separate block optimization and loop sequence optimization; step 3, performing multi-layer joint block optimization and loop sequence optimization; and step 4, performing dynamic composite block optimization and loop sequence optimization of single-layer and multi-layer. The present application can finally realize a multi-layer joint data block strategy with minimum DRAM access, a loop unrolling control strategy, and a data storage mapping update strategy, and realize a data access and data flow scheme with maximized data multiplexing of fine granularity, which can effectively support code automatic generation and calculation mapping optimization for optimizing calculation and memory efficiency.

The invention provides an instruction set optimization and compilation scheduling method and system for an artificial intelligence chip, and relates to the technical field of artificial intelligence, and the method comprises the steps: carrying out the multi-level abstract modeling of a neural network calculation graph, constructing a cross-basic-block instruction movement legality judgment mechanism, and carrying out the compilation scheduling of the instruction set. And analyzing the space-time locality characteristics of the instruction sequence to establish a data multiplexing mode, pre-planning a data migration path, cooperatively mapping with the on-chip interconnection network, and finally generating a target code and dynamically adjusting. The AI chip computing efficiency can be improved, power consumption can be reduced, the resource utilization rate can be optimized, and the chip adaptability can be enhanced.

Disclosed are an accelerator for accelerating an inference process of an unstructured sparse large language model and an operating method therefor. The accelerator comprises: a processor module, a direct memory access module, memory controller modules, DDR memory modules, an interconnection bus module, computing core modules, and router modules. The interconnection bus module is connected to the direct memory access module, the memory controller modules, and the computing core modules. The processor module is connected to the direct memory access module. The DDR memory modules are connected to the memory controller modules. Each router module is connected to a computing core module and an adjacent router module. The computing core modules acquire, by means of the interconnect bus module, data to be computed from the off-chip DDR memory modules. According to the present invention, the limitation of data reuse only along a single row or a single column on a traditional systolic array is broken, achieving data reuse across rows and columns, and alleviating pressure on a hardware device. Furthermore, a bit mask is used to encode a non-zero element position, thereby improving computing efficiency.

This invention relates to the field of food security technology, specifically to a digital twin intelligent management system for the entire lifecycle of irrigation districts, oriented towards food security. The system includes: a data creation terminal, a scheme generation terminal, and a management execution terminal. The data creation terminal is used for data collection and preprocessing of the collected data to provide data support for subsequent modules. The scheme generation terminal builds a digital twin model based on the collected data and performs scheme deduction within the digital twin model. The management execution terminal selects the optimal scheme based on the scheme generated by the scheme generation terminal and performs fine-tuning during execution to achieve optimal results, while also storing system data. This system features efficient data interaction and linkage between modules, replacing traditional experience-based reliance with data-driven predictive models and intelligent optimization methods, and possesses capabilities for precise disaster response, quantitative risk-return assessment, and secure data reuse.

This invention discloses a hardware accelerator, device, and application method for sparse matrix-vector multiplication. The hardware accelerator includes an off-chip storage system, an on-chip network for data exchange routing, and an on-chip processing system for performing data fetching, multiplication calculations, and matrix row element merging. The off-chip storage system includes HBM channels for storing five types of data: column indices, row indices, vector values, matrix values, and result vectors. Each HBM channel includes an HBM stack and a memory controller. The HBM channels for storing vector values ​​are connected to the on-chip network via a L2 cache, while the remaining HBM channels are directly connected to the on-chip processing system. This invention aims to improve on-chip data reuse in hardware accelerators for sparse matrix-vector multiplication, reduce off-chip memory accesses, and improve the performance and energy efficiency of the hardware accelerator.

An adaptive filtering algorithm for underwater acoustic channel estimation belongs to the technical field of underwater acoustic channel estimation. The idea of proportional matrix and data reuse is introduced to compute the proportional coefficient corresponding to each tap in each iteration, thereby improving the applicability of the algorithm in a sparse environment; and the accumulated error term is obtained by reusing the input signal and the desired signal within the same time, further improving the accuracy of the algorithm. The accuracy of the recursive least squares algorithm is improved in the sparse environment, which is helpful to the efficient development of underwater acoustic communication research.

The application discloses a kind of comprehensive sewage plant newly added drainage sludge produced risk characteristic analysis method, it is related to dangerous waste identification technical field.The method includes: obtaining original sludge historical identification data as benchmark;Determine whether historical data has reuse condition;Identify and detect characteristic pollutants in newly added drainage enterprise wastewater;Based on the principle of risk maximization, newly added pollutant concentration is converted and added to benchmark data, to obtain theoretical total concentration and carry out theoretical determination;Verification detection is carried out through small test simulation experiment;Combined with theoretical determination and verification result, final conclusion is issued.The application establishes the rapid identification system of "historical data reuse + wastewater conversion + small test verification", which can reduce the cost by about 70% and shorten the cycle by about 60% without sacrificing the accuracy of identification, providing a technical solution that considers efficiency and accuracy in the field of hazardous waste identification.

The invention discloses a channel water depth measurement data management system and method, and relates to the technical field of water transportation engineering surveying and mapping, and the system comprises a water depth correction module which is used for building a new engineering file, carrying out the data quality verification and water depth correction of the measurement initial data collected by a sensor, determining the corrected water depth data, and storing the corrected water depth data in a database; project file information, correction parameters and corrected water depth data are stored in a data storage module; and the comprehensive management module is used for executing channel maintenance dredging analysis and navigation mark deviation analysis according to the corrected water depth data on the basis of a newly built project file, updating project file information and storing the updated project file information and analysis result data to the data storage module. The data security risk can be reduced, the data management is standard, the quality traceability is easy, and the data reuse rate is improved.

The application discloses a matrix multiplication conversion method and device based on systolic array convolution calculation, a medium, equipment and a program product, and belongs to the technical field of neural network processors. The method mainly comprises the following steps: according to the input channel number of an input feature map of a systolic array, cutting matrix row data of a first matrix, and inputting the cut matrix row data of the same row into the systolic array in the form of row data; according to the input channel number and the output channel number of the weight of the systolic array, cutting matrix column data of a second matrix, and inputting the cut matrix column data of the same row into the systolic array in the form of column data; and calculating the product of the first matrix and the second matrix by using the systolic array. The application improves the data reuse rate of matrix multiplication operation, reduces memory access, improves the cache utilization rate, and optimizes data locality.

The invention discloses a self-adaptive learning and training integrated teaching system based on artificial intelligence, and relates to the technical field of learning and training integrated teaching. The system comprises a data perception and fusion module, a fusion degree regulation and control module and a teaching coordination regulation and control module. According to the method, the knowledge graph is constructed through multi-source data fusion, the data multiplexing frequency and the fusion trigger threshold are dynamically regulated and controlled based on the ecological fusion degree, and the knowledge graph self-updating frequency and the skill portrait dynamic updating frequency are fed back and optimized according to the teaching coordination efficiency; according to the method, closed-loop control of data fusion-strategy control-teaching execution-effect evaluation is formed, adaptive optimization and digital transformation jump of adaptive learning and training fusion teaching are realized, the reliability of the adaptive learning and training fusion teaching is improved, and the problem of low reliability of the adaptive learning and training fusion teaching in the prior art is solved.

The invention provides a GPU data access method and system based on video memory cache, and the method comprises the steps: firstly querying whether an effective cache version of data needing to be accessed exists in a video memory, and if the effective cache version of the data needing to be accessed exists in the video memory, directly obtaining the data from the video memory by a GPU to avoid repeated access to a main memory; only when the required data are not cached in the video memory, the required data are obtained from the main memory and are sorted and loaded according to needs, so that the data exchange efficiency between the CPU and the GPU is improved. According to the method, data transmission delay caused by data redundancy is effectively reduced through a data scheduling and caching strategy, the method is particularly suitable for application scenes with high data reusability, and the overall efficiency of GPU data access is improved. According to the method, an existing hardware architecture does not need to be changed, and upper-layer application program codes do not need to be modified; by optimizing the data transmission process in the driving layer, the performance bottleneck is effectively solved, and the overall performance of the system is improved to the maximum extent under the set condition.

The invention discloses a system and a method for testing comprehensive performance of software. The system comprises a front-end interaction module based on Vue.js, a back-end service module based on Node.js, a test scheduling and scoring module and a data storage module. The front-end interaction module provides a unified operation interface; the back-end service module processes a test task through an API interface, calls a test tool by using a sub-process and analyzes original data; the test scheduling and scoring module supports a comprehensive and single test mode, has a historical data reuse prompt function in the comprehensive mode, configures weight for each test item, and calculates a comprehensive score based on a test result and a preset threshold value; and the data module adopts an SQLite database to store various test data. Integrated management, automatic scheduling and intelligent evaluation of various test tools are realized, and the test efficiency and the result analyzability are remarkably improved.

The invention belongs to the technical field of GPU (Graphics Processing Unit) processing, and discloses a multi-version concurrency control method for GPU accelerated transaction processing. The high parallel computing capability of the GPU is utilized, and a multi-version data storage scheme is adopted, so that the transaction processing speed is increased. According to the method and the system, the transactions are stored, the concurrency among the transactions is increased, the concurrency in the transactions is increased, the atomicity of the transactions is ensured, and large-scale concurrency of the transactions is realized and resource consumption caused by a high transaction abortion rate due to conflicts is reduced through a multi-version storage scheme in which metadata and loads are separated and an in-batch repair technical framework. According to the method, transaction processing on a GPU end is expanded to a multi-version storage scheme, GPU resources are utilized to the maximum extent through separation of metadata and load data and an efficient merging access mechanism, and a low abortion rate is ensured while the concurrency degree during execution is improved by adopting an optimistic concurrency control scheme and an in-batch repair mechanism. And meanwhile, the overhead of multiple data transmission is reduced by using light garbage collection and data reuse.