TIADC system sampling moment mismatch digital background calibration method with low hardware overhead

A technology of sampling time and hardware overhead, applied in analog/digital conversion calibration/testing, electrical components, analog-to-digital converters, etc., it can solve complex operation conditions, the input signal cannot achieve complete Nyquist band mismatch calibration, Problems such as multiple hardware resources, to achieve the effect of low hardware overhead, reduced number of adders, and easy number

Active Publication Date: 2019-11-01
SOUTHEAST UNIV
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Problems solved by technology

However, these self-adaptive methods have relatively complex calculation conditions, and they need to consume too many hardware resources when implemented with

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  • TIADC system sampling moment mismatch digital background calibration method with low hardware overhead
  • TIADC system sampling moment mismatch digital background calibration method with low hardware overhead
  • TIADC system sampling moment mismatch digital background calibration method with low hardware overhead

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[0038] The present invention will be further described below in conjunction with the accompanying drawings, so that those skilled in the art can better understand the present invention.

[0039] The overall block diagram of this calibration method is attached figure 1 As shown, the present invention belongs to an all-digital background calibration algorithm, and both mismatch estimation and mismatch compensation are performed in the digital domain. A calibration scheme for the sampling time mismatch between channels in the TIADC system is proposed. The detailed introduction of the subsequent schemes is based on the premise that the offset and gain mismatch between channels have been calibrated. attached figure 1 Among them, the TIADC combination output directly enters the digital calibration part, and the mismatch estimation and mismatch compensation correspond to the mismatch estimation module and the reconstruction filter respectively. The mismatch estimation utilizes the ...

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Abstract

The invention discloses a TIADC system sampling moment mismatch digital background calibration method with low hardware overhead. On the basis of Lagrange interpolation, a reconstruction filter is realized to compensate the mismatch at the sampling moment. By simplifying the polynomial expression of the interpolation coefficient, compared with other perfect reconstruction methods, the architectureprovided by the invention has the advantages that about 41% of multipliers are saved, and the number of adders is also greatly reduced. Simulation verification is carried out in a four-channel 800MSPS 12-bit TIADC system, and the result shows that the TIADC system can obtain at least 72dB SNDR within the bandwidth of 0.4 fs input signals. Due to the full-digital realization characteristic of thecalibration algorithm, the method is very suitable for being applied to FPGA or DSP equipment to realize data post-processing. Meanwhile, in a high-speed multi-channel TIADC system, the number of multipliers and adders which are greatly reduced is more easily integrated in a chip, and conversion between different advanced process nodes is more flexible.

Description

technical field [0001] The invention relates to the technical field of high-speed analog-to-digital converters, in particular to a low hardware overhead TIADC system sampling time mismatch digital background calibration method. Background technique [0002] High-speed digital forming technology can obtain the most detailed information of useful signals and is widely used in many fields, such as nuclear physics experiments, data communications, test instruments and medical imaging. For high-speed digital shaping technology, time-interleaved ADC (Time-Interleaved ADC, TIADC) is based on the current ADC technology to obtain a higher sampling rate is known. However, the offset, gain, and sampling time mismatch between channels reduce the dynamic performance of the TIADC system such as spurious-free dynamic range (Spurious FreeDynamic Range, SFDR) and signal-to-noise-distortion ratio (Signal-to-Noise and Distortion, SNDR). Therefore, mismatch calibration between channels has alw...

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Application Information

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IPC IPC(8): H03M1/10H03M1/12
CPCH03M1/1009H03M1/1245
Inventor 吴建辉闵嘉炜李鑫黄成李红
Owner SOUTHEAST UNIV
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