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Integrated circuit packaging method and semiconductor device

A technology of integrated circuits and packaging methods, which is applied in the manufacture of semiconductor devices, electrical solid devices, semiconductor/solid devices, etc., can solve problems such as lead frame warping, bonding wire breakage, and different thermal coefficients, so as to avoid lead frame Warpage and bonding wire breakage, and the effect of improving the yield

Active Publication Date: 2021-04-13
HOSIN GLOBAL ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The technical problem to be solved by the present invention is to provide an integrated circuit for the above-mentioned integrated circuit in the plastic packaging process due to the difference in thermal coefficient between the bare chip of the integrated circuit and the plastic packaging material, which may easily lead to warping of the lead frame and snapping of the bonding wire. Packaging method and semiconductor device

Method used

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  • Integrated circuit packaging method and semiconductor device
  • Integrated circuit packaging method and semiconductor device
  • Integrated circuit packaging method and semiconductor device

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Embodiment Construction

[0034] The following disclosure provides many different embodiments, or examples, for implementing different features of the presented subject matter. Specific examples of components, values, operations, materials, arrangements, etc. are set forth below to simplify embodiments of the invention. Of course, these are examples only and are not intended to be limiting. Other components, values, operations, materials, arrangements, etc. are contemplated. For example, the description below that a first feature is formed "over" or "on" a second feature may include embodiments where the first and second features are formed in direct contact, and may also include embodiments where the first feature is formed in direct contact. Embodiments where an additional feature may be formed between a feature and a second feature such that the first feature may not be in direct contact with the second feature. In addition, the embodiments of the present invention may reuse reference numerals and...

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Abstract

The present invention provides an integrated circuit packaging method and a semiconductor device. The method includes: (a) identifying a base plate on which an integrated circuit die is mounted, and according to the identification information of the base plate on which an integrated circuit die is mounted, Generate a plastic package model, on the base plate with integrated circuit bare crystals, the contact electrodes of the integrated circuit bare crystals are connected to the pins on the base plate through bonding wires in one-to-one correspondence; (b) according to the In the plastic packaging model, a plurality of stacked and insulated photocurable adhesive layers are sequentially formed on the side of the bottom plate where the integrated circuit bare crystal is mounted, and the integrated circuit bare crystal and bonding wires are wrapped in a plurality of the light-curing adhesive layers. within the cured adhesive layer. The invention avoids the warping of the lead frame and the breaking of the bonding wire during the plastic sealing process by sequentially forming a plurality of superimposed and insulated light-curing adhesive layers on the side of the lead frame where the bare integrated circuit is mounted, and improves the integration efficiency. The qualification rate of circuit packaging.

Description

technical field [0001] The invention relates to the field of integrated circuit packaging, and more specifically, to an integrated circuit packaging method and a semiconductor device. Background technique [0002] Modern products are thin, light and small, so many discrete circuits are integrated into integrated circuits. At present, integrated circuits have been widely used in personal computers, mobile phones, digital cameras, and other electronic devices. In order to provide a stable and reliable working environment for the integrated circuit, and to protect the integrated circuit mechanically or environmentally, so that the integrated circuit can perform normal functions and ensure its high stability and reliability, it is necessary to package the integrated circuit . [0003] For the existing general integrated circuits, most of them are in the form of plastic packaging, and the main packaging forms are: PDIP (plastic dual in-line package), PLCC (plastic leaded chip c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/48H01L21/56
CPCH01L21/4875H01L21/4871H01L21/56H01L2224/8592H01L2224/48091H01L2924/00014
Inventor 赖振楠
Owner HOSIN GLOBAL ELECTRONICS CO LTD