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Wear-leveling garbage collection accelerating device supporting two bit widths

A wear leveling and acceleration device technology, applied in memory address/allocation/relocation, instrumentation, computing, etc., can solve the problems of slow flash memory erase and write operations and long time consumption, so as to reduce time consumption, improve use efficiency and The effect of service life

Active Publication Date: 2019-11-22
SHANDONG SINOCHIP SEMICON
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, it takes a long time to read and compare the information in the block information table one by one through software alone, which makes the erase and write operations of flash memory slower.

Method used

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  • Wear-leveling garbage collection accelerating device supporting two bit widths

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Embodiment Construction

[0018] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0019] This embodiment discloses a wear leveling garbage collection acceleration device that supports two bit widths, such as figure 1 As shown, it includes a block information table, a data reading module, a maximum value generation module, a configuration module, and a data bus control bus.

[0020] The block information table is stored in the cache after the system is powered on, and stored in the Flash after the power is turned off. The block information table stores information such as the erasure information of the block, the number of valid pages in the block, and the average number of erasing times. This method can Find the most valuable index value of one or several comparison items in the block information table of the specified type, and improve the erasing efficiency of the software for Flash according to the wear leveling and garba...

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Abstract

The invention discloses a wear-leveling garbage collection accelerating device supporting two bit widths. The device comprises a data reading module, an extreme value generation module, a configuration module, a data bus and a control bus. The configuration module gives out data reading information and maximum value generation information, initiates data reading, and after the maximum value is generated, a comparison result is fed back to the system bus. The data reading module reads the content of the block information table of the corresponding address from the data bus according to the datareading information from the configuration module, and the extreme value generation module iteratively compares the data entering from the data reading module according to the extreme value generation information given by the configuration module to finally obtain an extreme value index. The device adopts a hardware acceleration strategy to help realize wear leveling and garbage collection, can support free combination of two bus bit widths and two firmware structure sizes, reduces the time consumed by Flash erasing each time, improves the use efficiency of a flash memory, and prolongs the service life of the flash memory.

Description

technical field [0001] The invention relates to a wear leveling garbage collection acceleration device supporting two kinds of bit widths, using hardware to accelerate the search and comparison of table items in FTL (Flash translation layer), and adopting different hardware designs for different FTL tables and different bus bit widths , to help with wear leveling and garbage collection of flash memory. Background technique [0002] Flash memory has the characteristics of limited erasing times and erasing first, then writing. Therefore, it is necessary to balance the erasing frequency of each block in the flash to prolong the service life of the flash memory, which is the so-called wear leveling. Copying the 'valid' page data from a flash block to a 'blank' block and then completely erasing the block is called garbage collection. In order to achieve wear leveling and garbage collection, the software needs to establish a table (block information table) containing information ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/02
CPCG06F12/0246G06F12/0253Y02D10/00
Inventor 王运哲刘大铕朱苏雁刘奇浩刘尚孙中琳王资川
Owner SHANDONG SINOCHIP SEMICON