Server health management chip based on Loongson IP core and implementation method
A technology for health management and implementation methods, which is applied in the fields of instruments, electrical digital data processing, computers, etc., to achieve the effects of convenient and simple use, sophisticated design, and broad application prospects.
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Embodiment 1
[0031] as attached figure 1 As shown, the server health management chip based on Loongson IP core of the present invention includes Loongson main processor, Loongson coprocessor, internal bus interconnection module, high-speed interface module, low-speed interface module and video compression engine module, Loongson main processor Both the Loongson processor and the Loongson coprocessor use the Loongson IP core as the main processing unit of the chip; the Loongson main processor and the Loongson coprocessor are respectively connected to the internal bus interconnection module, and the internal bus interconnection module is respectively connected to the high-speed interface module, low-speed interface module and video compression engine module.
[0032] Among them, the Loongson main processor is used to run the operating system, various application layer software and control instructions; the Loongson co-processor is used to complete low-speed tasks and assist the Loongson main...
Embodiment 2
[0038] The server health management implementation method based on the Godson IP core of the present invention, the method steps are as follows:
[0039] S1. The external video input signal is input to the Loongson main processor and Loongson coprocessor through the DVI video interface, converted into RGB signals through the DVI video interface IP, and buffered to the video signal stream Buffer;
[0040] S2. The video compression IP reads the RGB signal when the video stream is cached to the set number of frames, completes the hardware JPEG compression and caches it to the compression Buffer;
[0041] S3. When the compressed Buffer is cached to the set number of frames, call the DDR3 interface controller IP through DMA and write it into the corresponding memory address to complete the temporary storage of video compression;
[0042] S4. After completing the video compression of one frame, the Loongson main processor and the Loongson coprocessor call the DDR3 interface controll...
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