Phase synchronization method, device and terminal

Abstract

The invention provides a phase synchronization method, a device and a terminal, and relates to the technical field of time service, the phase synchronization method comprises the following steps: sending a first clock signal to a receiving device; detecting a phase difference between the first clock signal and a third clock signal sent by a zero delay module; performing feedback of the second clock signal to the time service device through zero delay of the second clock signal; setting the ratio of the first path delay to the second path delay as a preset value, and obtaining a phase shift value according to the preset value and the phase difference; realizing phase shift of the second clock signal according to the phase shift value so as to realize phase alignment of the first clock signal and the output signal; phase synchronization of the output signal of the time service device and the output signal of the receiving device can be realized, errors caused by phase introduction are reduced, and the time service precision is improved.

Description

technical field [0001] The present invention relates to the technical field of time service, in particular to a phase synchronization method, device and terminal. Background technique [0002] Time synchronization is a basic requirement of communication products. The 5G communication that is about to be commercialized requires the accuracy of time synchronization to reach ns or even sub-ns level. The realization of time synchronization in the communication equipment requires the cooperation of the clock card (time provider or Master) and the line card (receiver or Slave). At present, the basic method to achieve time synchronization is: the time provider sends the initial time to the receiver; The party sends the current time to complete the table pairing. At present, the frequency signal is usually sent to the receiver through timing, and the receiver uses PLL (Phase Lock Loop) to lock the frequency of the receiver to achieve time synchronization. However, the PLL in this...

AI Technical Summary

Problems solved by technology

At present, the frequency signal is usually sent to the receiver through timing, and the receiver uses PLL (Phase Lock Loop) to lock the frequency of the receiver to achieve time synchronization.

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