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33results about How to "Achieving Phase Synchronization" patented technology

Multi-channel high-speed digital-to-analogue converter (DAC) synchronization method

The invention discloses a multi-channel high-speed digital-to-analogue converter (DAC) synchronization method, which comprises the following steps of: first generating a digital signal source reference signal, a synchronous clock signal and a resetting signal by using a field programmable gate array-MASTER (FPGA-MASTER), simultaneously transmitting the signals to an FPGA-SLAVEP and a DACM, and roughly adjusting multi-path delay, wherein P and M are positive integers; then performing FPGA-MASTER synchronous clock phase discrimination in the FPGA-SLAVEP, and regulating a phase difference to 0 by using a fine delay module; and finally performing DACM reference clock phase discrimination in the FPGA-SLAVEP, and regulating a phase difference to 0 by using the fine delay module. Output signals can be subjected to phase synchronization, a plurality of FPGAs and a plurality of high-speed DACs can be simultaneously cascaded without the limitation of clock speed of the DACs, and FPGA-SLAVEPs are used for performing phase discrimination and phase regulation on the FPGA-MASTER and the DACs to make the phases of data of the FPGA-MASTER, the FPGA-SLAVEs and the DACs consistent, so that the time sequence of each path of DAC is completely synchronous and controllable, working efficiency is improved, and a signal output bandwidth is expanded.
Owner:TSINGHUA UNIV

Method, device and system for inhibiting ring current between large power PWM (Pulse-Width Modulation) rectification power supply modules

The invention relates to a method, a device and a system for inhibiting ring current between large power PWM (Pulse-Width Modulation) rectification power supply modules. The method comprises steps of collecting three phase input current of a first rectification power supply module to obtain ring current between the first rectification power supply module and a second rectification power supply module; obtaining a phase difference of triangular carrier signals of the first rectification power supply module and the second rectification power supply module according to the ring current; calculating a carrier compensation delay time according to the carrier phase difference; and adjusting a phase of the triangular carrier signal of the first rectification power supply module according to the carrier compensation delay time so as to synchronize phases of the triangular carrier signals of the first rectification power supply module and the second rectification power supply module. The invention can effectively inhibit ring current between two rectification power supply modules, balances loads of the two rectification power supply modules, and improves safety and stability of a power distribution network.
Owner:HUNAN UNIV +1

Non-interrupted bistatic SAR phase synchronization signal processing method based on coded signal

The embodiment of the invention discloses a non-interrupted bistatic SAR phase synchronization signal processing method based on a coded signal. The method comprises the steps of: when a first receiving signal of a first SAR only contains a first synchronization receiving signal, directly taking the first receiving signal as a first echo processing signal; when the first synchronization receivingsignal is contained in the first receiving signal, extracting the peak phase of the synchronous signal, and separating the synchronous signal to obtain a first echo processing signal; when a second synchronous receiving signal is not contained in the second receiving signal of a second SAR, directly taking the second receiving signal as a second echo processing signal; and when a second echo receiving signal is contained in the second receiving signal, extracting the peak phase of the synchronous signal, and separating the synchronous signal to obtain a second echo processing signal. The consumption phase is calculated according to the peak phase, and is compensated in the second echo processing signal after interpolation, and the obtained first and second echo processing signals are subjected to normal imaging processing.
Owner:INST OF ELECTRONICS CHINESE ACAD OF SCI

Clock synchronization method for equipment in local area network

The invention discloses a clock synchronization method for equipment in a local area network. The method comprises the following steps: based on an IEEE 1588 protocol design idea, concentrating clockinformation of each device in a time management unit through a reciprocating message; calculating according to the time of each device and the time management unit information to obtain a phase deviation and a frequency correction coefficient of the device; associating the phase deviation with the frequency correction coefficient and the equipment number to generate a relative time deviation list,and sending the relative time deviation list to each piece of equipment needing to be synchronized; and enabling the equipment to inquire the relative deviation time list according to the equipment number and the target equipment number to obtain the frequency correction coefficient of the equipment and the relative time deviation of the equipment and the target equipment, so that clock phase synchronization and frequency correction can be realized. According to the clock frequency synchronization method based on the list, the problems that in the IEEE 1588 protocol synchronization process, the load is large, and the clock synchronization execution period is possibly long are solved, and in the time synchronization process, the clock frequency synchronization method based on the list is provided.
Owner:CIVIL AVIATION UNIV OF CHINA

Method for measuring compensation of power quality device

The invention discloses a method for measuring compensation of a power quality device. The method includes the steps: acquiring a fundamental wave and a harmonic wave of a power quality device after harmonic analysis; acquiring a voltage theoretical conversion coefficient and a current theoretical conversion coefficient; acquiring an automatic calibration voltage amplitude compensation coefficient, an automatic calibration current amplitude compensation coefficient, an automatic calibration voltage phase compensation coefficient and an automatic calibration current phase compensation coefficient; acquiring a voltage interval amplitude compensation coefficient and a current interval amplitude compensation coefficient; acquiring a voltage frequency phase compensation coefficient and a current frequency phase compensation coefficient; acquiring a voltage temperature amplitude compensation coefficient and a current temperature amplitude compensation coefficient; and calculating the amplitude and phase of the compensated fundamental wave voltage, the amplitude and phase of the compensated fundamental wave current, the amplitude and phase of the compensated harmonic voltage, and the amplitude and phase of the compensated harmonic current. Therefore, the phase synchronization of the power quality device is realized and the measurement accuracy of the power quality device is improved effectively.
Owner:ELECTRIC POWER RESEARCH INSTITUTE, CHINA SOUTHERN POWER GRID CO LTD +1

Multi-channel high-speed digital-to-analogue converter (DAC) synchronization method

The invention discloses a multi-channel high-speed digital-to-analogue converter (DAC) synchronization method, which comprises the following steps of: first generating a digital signal source reference signal, a synchronous clock signal and a resetting signal by using a field programmable gate array-MASTER (FPGA-MASTER), simultaneously transmitting the signals to an FPGA-SLAVEP and a DACM, and roughly adjusting multi-path delay, wherein P and M are positive integers; then performing FPGA-MASTER synchronous clock phase discrimination in the FPGA-SLAVEP, and regulating a phase difference to 0 by using a fine delay module; and finally performing DACM reference clock phase discrimination in the FPGA-SLAVEP, and regulating a phase difference to 0 by using the fine delay module. Output signals can be subjected to phase synchronization, a plurality of FPGAs and a plurality of high-speed DACs can be simultaneously cascaded without the limitation of clock speed of the DACs, and FPGA-SLAVEPs are used for performing phase discrimination and phase regulation on the FPGA-MASTER and the DACs to make the phases of data of the FPGA-MASTER, the FPGA-SLAVEs and the DACs consistent, so that the time sequence of each path of DAC is completely synchronous and controllable, working efficiency is improved, and a signal output bandwidth is expanded.
Owner:TSINGHUA UNIV

Multi-channel intermediate-frequency data synchronization processing method and system for array imaging

The disclosure provides a multi-channel intermediate-frequency data synchronization processing method and system for array imaging. A processor is connected to each intermediate-frequency acquisitionboard card through an acquisition trigger connecting wire; and the intermediate-frequency acquisition board cards connected with the processed by buses are used for interaction of multi-channel intermediate-frequency data. The processor receives trigger signals for sampling the intermediate-frequency data and sends the trigger signals to the intermediate-frequency acquisition board cards. After the intermediate-frequency acquisition board cards receive the trigger signals synchronously, ADC sampling is performed; and the processor processes the multi-channel data rapidly and synchronously. Compared with the existing multi-channel intermediate-frequency acquisition and digital processing method, the multi-channel intermediate-frequency data synchronization processing method and system havethe following beneficial effects: phase synchronization of multi-channel intermediate-frequency signal acquisition in array imaging is realized; rapid array imaging is realized by fast synchronous digital processing of acquired multi-channel data; and the imaging test efficiency is improved.
Owner:CHINA ELECTRONIS TECH INSTR CO LTD

Device and method for clock signal recovery and NFC chip

The invention relates to the technical field of wireless communication, and discloses a device for clock signal recovery. The device includes: a differential input signal module which is used for acquiring antenna voltage and generating a differential input signal according to the antenna voltage; a pre-amplification module, wherein the first end of the pre-amplification module is electrically connected with one end of the differential input signal module, and the pre-amplification module is used for amplifying the differential input signal; a comparator, wherein one end of the comparator is electrically connected with the second end of the pre-amplification module, and the comparator is used for comparing the amplified differential input signals to obtain clock signals; and a negative feedback module, wherein the first end of the negative feedback module is electrically connected with the other end of the differential input signal module, the second end of the negative feedback module is electrically connected with the third end of the pre-amplification module, the third end of the negative feedback module is electrically connected with the other end of the comparator, and the negative feedback module is used for adjusting an amplification parameter of the differential input signal according to the clock signal so as to recover the clock signal. The invention also discloses a method for clock signal recovery.and an NFC chip.
Owner:北京紫光青藤微系统有限公司

Device and method for clock signal recovery, nfc chip

The present application relates to the technical field of wireless communication, and discloses a device for recovering a clock signal. Including: a differential input signal module, which is used to obtain the antenna voltage and generate a differential input signal according to the antenna voltage; a pre-amplification module, the first end of which is electrically connected to one end of the differential input signal module; the pre-amplification module is used to amplify the differential input signal; A comparator, one end is electrically connected to the second end of the pre-amplification module, the comparator is used to compare the amplified differential input signal to obtain a clock signal; the negative feedback module, the first end is electrically connected to the other end of the differential input signal module, The second end of the negative feedback module is electrically connected to the third end of the pre-amplification module, and the third end of the negative feedback module is electrically connected to the other end of the comparator; the negative feedback module is used to perform the amplification parameter of the differential input signal according to the clock signal adjustment to achieve recovery of the clock signal. The application also discloses a method for recovering a clock signal and an NFC chip.
Owner:北京紫光青藤微系统有限公司

A method for measuring and compensating a power quality device

The invention discloses a method for measuring and compensating a power quality device. The method comprises the steps of: obtaining the fundamental wave and harmonics of the power quality device after harmonic analysis; obtaining the theoretical conversion coefficient of voltage and the theoretical conversion coefficient of current; obtaining the automatic Calibrate the voltage amplitude compensation coefficient, automatically calibrate the current amplitude compensation coefficient, automatically calibrate the voltage phase compensation coefficient and automatically calibrate the current phase compensation coefficient; obtain the voltage interval amplitude compensation coefficient and the current interval amplitude compensation coefficient; obtain the voltage frequency phase compensation coefficient and current frequency phase compensation coefficient; obtain the voltage temperature amplitude compensation coefficient and current temperature amplitude compensation coefficient; calculate the amplitude and phase of the compensated fundamental wave voltage, the amplitude and phase of the compensated fundamental wave current, and the compensated harmonic The amplitude and phase of the voltage, the amplitude and phase of the compensated harmonic current. The invention can realize the phase synchronization of the power quality device and effectively improve the measurement accuracy of the power quality device.
Owner:ELECTRIC POWER RESEARCH INSTITUTE, CHINA SOUTHERN POWER GRID CO LTD +1

Energy storage inverter phase synchronization method based on half-angle characteristic

The invention discloses an energy storage inverter phase synchronization method based on a half-angle characteristic, and the method comprises the steps: collecting an input voltage signal of a power grid, locking a phase angle of the input voltage signal through a rotation coordinate method, and obtaining a sine value and a cosine value of a rotation angle of the input voltage signal according to the phase angle of the input voltage signal; according to a half-angle characteristic formula, sine values and cosine values of the input voltage signal and the output voltage signal are converted into sine values and cosine values in a half-angle form; converting the sine value and the cosine value in the half-angle form into a sine value of a phase angle difference value of the input voltage signal and the output voltage signal according to a two-angle sum formula; and according to PI control, taking the sine value of the phase angle difference as an input quantity to regulate and control the phase of the output voltage signal. According to the invention, phase synchronization of the power grid before grid connection of the inverter is realized, the phase difference between the inverter synchronization signal and the power grid signal is reduced, the current generated due to the voltage difference during grid connection is reduced, and the stability of the inverter is improved.
Owner:GUANGZHOU SANJING ELETRIC

A phase synchronization method for fmcw SAR based on distributed satellites

The invention provides an FMCW SAR phase synchronization method based on distributed satellites. The method comprises the following steps: at any time t, emission satellite output signals are emitted after being respectively subjected to K frequency multiplication and N frequency multiplication; and then frequency mixing with carrier frequency signals is carried out after M frequency multiplication, and emission-end carrier wave phase differences are obtained through frequency spectrum peak extraction. One path of receiving satellite output signals are subjected to frequency mixing with echo signals after K frequency multiplication, and thus dual-station echo signals are obtained; one path of the receiving satellite output signals are emitted after M frequency multiplication; and one path of the receiving satellite output signals are subjected to frequency mixing with the received emission signals after N frequency multiplication, and receiving-end carrier wave phase differences are obtained through frequency spectrum peak extraction. According to the invention, the emission-end carrier wave phase differences and the receiving-end carrier wave phase differences at any time t can be obtained by use of such a process, and compensation phases of the dual-station echo signals are obtained after difference processing is performed on the emission-end carrier wave phase differences and the receiving-end carrier wave phase differences. According to the invention, the measurement frequency of the carrier wave phase differences can be improved, and the phase synchronization precision is improved.
Owner:NAT UNIV OF DEFENSE TECH

High-precision optical fiber time transfer system and method

The invention discloses a high-precision optical fiber time transmission system which comprises a local reference frequency signal generation module, a local trigger time signal generation module, a local high-precision time frequency synchronization module, a local time frequency transmission device, a local return time frequency synchronization module, a far-earth time frequency transmission device and a far-earth high-precision time frequency synchronization module. The system is based on a high-precision time signal generation and transmission technology of time frequency signal phase synchronization. Phase locking of the demodulated and recovered time signal and the demodulated and recovered frequency signal is achieved through the high-precision time-frequency synchronization module,a low-jitter time signal synchronous with the phase of the frequency signal in real time is generated, and transmission of the high-precision time signal is achieved while the time signal is output.Meanwhile, the invention provides a high-precision optical fiber time transmission method. According to the invention, the phase locking of the rising edge of the time signal and the sine frequency signal is realized, and the high-stability frequency signal is utilized to generate the low-jitter time signal synchronous with the phase of the high-stability frequency signal, so that the high-precision transmission of the time signal is realized.
Owner:SHANGHAI INST OF OPTICS & FINE MECHANICS CHINESE ACAD OF SCI

Integrated Circuit Bypass Signal Differential Amplification Sampling System and Acquisition Method

The invention relates to an integrated circuit bypass signal difference amplification sampling system and an acquisition method. The sampling system comprises a control unit and a collection unit; the control unit is connected to a collection unit through a first data port for controlling the collection process of the collection unit, transmitting a collection stop signal, regulating delaying parameters and filter parameters, receiving collected a digital bypass signals, and performing data interaction with the upper computer through the second data port; the collection unit comprises a first test socket for inserting the detected integrated circuit chip, a second test socket for inserting the safety chip, a difference amplifier, a band pass filter, an analog-to-digital converter and a second data port; and the first test socket and a second test socket are commonly connected to the same set of the periphery circuit. The integrated circuit bypass signal difference amplification sampling system and acquisition method can obtain the dynamic high accuracy bypass signal of the integrated circuit chip, can effectively inhibit the interference of the logic noise, gets rid of the dependence on the high accuracy oscilloscope, and improves the collection accuracy and collection efficiency on the integrated circuit.
Owner:PEOPLES LIBERATION ARMY ORDNANCE ENG COLLEGE
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