Data processing device
A technology of a data processing device and a processing unit, which is applied in the directions of data processing power supply, data reset device, electrical digital data processing, etc., can solve the problems of inability to determine the fault content of the power-on reset circuit, and inability to distinguish between normal and abnormal.
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Embodiment 1
[0023] The data processing device is a data processing device that can be applied to an electronic control system conforming to functional safety standards for automobiles. The data processing device has multiplexers 1a, 1b, power-on reset circuits (POR circuits) 2a, 2b, multiplexer 3, first expansion circuit 4, second expansion circuit 5, scratch pad register 6, digital / analog conversion circuit (DAC circuit) 7 , flip-flop circuit (FF) 8 , bus 10 , CPU 11 , memory 12 , timer 13 , and POR determination section 14 . In addition, the data processing device has a power supply terminal VDD, a monitor terminal DACTST, a first output level determination circuit 15 , a second output level determination circuit 16 , and an analog / digital conversion circuit (ADC circuit) 17 .
[0024] Scratch pad register 6, digital / analog conversion circuit 7, flip-flop circuit 8, memory 12, timer 13, POR determination section 14, first output level determination circuit 15, second output level deter...
Embodiment 2
[0054] The data processing device of the second embodiment is different from the data processing device of the first embodiment in that it has a logic gate 20 and a multiplexer 21 , and has a multi-bit selector 22 instead of the 1-bit-wide flip-flop circuit 8 .
[0055] The logic gate 20 is configured to take a logical OR (OR) of the outputs of the power-on reset circuits 2 a and 2 b and output it to the multiplexer 21 .
[0056] The multiplexer 21 is configured to select the output signal of the logic gate 20 when the selection signal s2 is 0, and to select the output of the multiplexer 3 when the selection signal s2 is 1.
[0057] The selector 22 is composed of a flip-flop circuit and a decoder circuit. The flip-flop circuit has, for example, a 2-bit structure having a physical structure in which at least upper bits are initialized to 0 when the power is turned on. For example, if Figure 5 As shown, the trigger circuit is configured to lose the balance of the output load....
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