Protective sheeting for use in processing wafer, handling system for wafer, and combination of wafer and protective sheeting
A technology for protecting sheets and wafers, which is applied in the fields of film/sheet adhesives, semiconductor/solid-state device manufacturing, electrical components, etc., and can solve the problem of adhesive layer adhesion damage, adhesive residue pollution, etc. problems, to minimize contamination and damage, to eliminate adhesive residue, and to minimize any risk
Active Publication Date: 2020-01-07
DISCO CORP
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- Application Information
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Problems solved by technology
[0008] However, especially in the case of sensitive devices such as Micro-electromechanical Systems (MEMS) MEMS, there is a problem that when the film or sheet is peeled off from the wafer, the device structures on the wafer may Damaged by the adhesion of the adhesive layer formed on the protective film or protective sheet, or contaminated by adhesive residue on the device
Method used
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Embodiment Construction
[0201] Preferred embodiments of the present invention will now be described with reference to the accompanying drawings. Preferred embodiments relate to protective sheets used in processing wafers W, to processing systems for wafers W, and to combinations of wafers W and protective sheets.
[0202] For example, wafer W may be a MEMS wafer having MEMS devices formed on the surface of its front side 1 . However, the wafer W is not limited to a MEMS wafer, but may also be a CMOS wafer with CMOS devices formed on its front side 1 , preferably as a solid-state imaging device, or a wafer with other types of devices on its front side 1 .
[0203] Wafer W may be made of a semiconductor, such as silicon. Such a silicon wafer W may include devices such as IC (Integrated Circuit) and LSI (Large Scale Integration) on a silicon substrate. Alternatively, the wafer may be an optical device wafer configured by forming optical devices such as LEDs (Light Emitting Diodes) on an inorganic mate...
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Abstract
The invention relates to a protective sheeting (10, 110, 210, 310, 410) for use in processing a semiconductor-sized wafer (W). The protective sheeting (10, 110, 210, 310, 410) comprises a protective film (4) and a cushioning layer (8) attached to a back surface (4b) of the protective film (4). At least in a central area of the protective sheeting (10, 10, 210, 310, 410), no adhesive is applied toa front surface (4a) and a back surface (8b, 9b) of the protective sheeting (10, 110, 210, 310, 410), the central area having an outer diameter which is equal to or larger than an outer diameter of the semiconductor-sized wafer (W). Further, the invention relates to a protective sheeting (10, 310, 410) for use in processing a wafer (W), the protective sheeting (10, 310, 410) comprising a protective film (4) and a cushioning layer (8) attached to a back surface (4b) of the protective film (4), wherein, on an entire front surface (4a) and an entire back surface (8b, 9b) of the protective sheeting (10, 310, 410), no adhesive is applied. Moreover, the invention relates to a handling system for a semiconductor-sized wafer (W) and to a combination comprising a wafer (W) and the protective sheeting (10, 110, 210, 310, 410).
Description
technical field [0001] The present invention relates to a protective sheet for use in processing wafers, especially semiconductor-sized wafers, to a processing system for semiconductor-sized wafers, the processing system comprising semiconductor-sized Ring-shaped frame and protective sheet, and relates to a combination comprising a wafer, especially a semiconductor-sized wafer, and a protective sheet, having a device area with a plurality of devices on one side of the wafer . Background technique [0002] In a semiconductor device manufacturing process, a wafer having a device region with multiple devices, usually divided by a plurality of dicing lines, is diced into individual dies. Such a manufacturing process typically includes a grinding step for adjusting the thickness of the wafer, and a dicing step for dicing the wafer along dicing lines to obtain individual dies. The grinding step is performed from the backside of the wafer opposite the wafer frontside on which the...
Claims
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IPC IPC(8): H01L21/67H01L21/78H01L21/304H01L21/683
CPCH01L21/78H01L21/304H01L21/67132H01L21/6836H01L21/6835C09J7/00C09J2203/326H01L21/3043
Inventor 卡尔·海因茨·普里瓦涉
Owner DISCO CORP