Semiconductor package

Abstract

A semiconductor package includes: a first structure including a plurality of stacked first semiconductor chips and electrically connected to a first redistribution layer through connection vias havingdifferent heights; and a second structure including a second semiconductor chip electrically connected to a second redistribution layer. The first and second redistribution layers are electrically connected to each other through an electrical connection member formed on the second structure.

Description

[0001] This application claims the benefit of priority from Korean Patent Application No. 10-2018-0081028 filed with the Korean Intellectual Property Office on July 12, 2018, the disclosure of which is hereby incorporated by reference in its entirety. technical field [0002] The present disclosure relates to a semiconductor package, for example, to a fan-out type semiconductor package capable of extending an electrical connection structure beyond an area where a semiconductor chip is disposed. Background technique [0003] In order to meet the demands of miniaturization, light weight, high capacity and multi-functionality of electronic devices, electronic circuit devices should perform more functions in a smaller space. Therefore, various semiconductor chips employed in such electronic devices need to be thinned and circuits miniaturized, and techniques for packaging such semiconductor chips to be miniaturized and made multifunctional are also required. Therefore, packaging...

AI Technical Summary

Problems solved by technology

Also, as the number of I / O terminals increases, so does the wire bonding equipment

Therefore, there is a limitation that most of the semiconductor chips cannot be used in circuits

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