Data operation method, device and system

Abstract

The embodiment of the invention provides a data operation method, device and system, and the method comprises the steps: judging whether a target address domain carried in a data operation request belongs to a virtual memory address domain corresponding to an equipment end or not, and enabling the virtual memory address domain to have a preset mapping relation with a physical memory address domainof a host end memory; if so, determining a physical memory address field corresponding to the target address field according to the preset mapping relationship; and performing data operation on the host memory according to the determined physical memory address field. By pre-determining a virtual memory address field having a certain mapping relationship with a physical memory address field whichis allocated to an equipment end to directly perform data operation in a host end memory, when the address field carried in the data operation request belongs to the virtual memory address field, thecorresponding physical memory address field is determined through address field conversion, so that data operation is directly carried out on the host memory, the data transmission efficiency is improved, and the data exchange delay is reduced.

Description

technical field [0001] The present application relates to the computer field, in particular to a data operation method, device and system. Background technique [0002] At present, with the increasing demand for fast processing of large data by computers, since the Field Programmable Gate Array (Field Programmable Gate Array, FPGA) is between a dedicated chip and a general-purpose chip, it has a certain degree of programmability and can simultaneously process data. Parallel and task-parallel computing have more obvious efficiency when dealing with specific applications, and Field Programmable Gate Array FPGA also has obvious performance-to-power ratio advantages. At the same time, based on the Open Computing Language (OpenCL), using high-level software language and model programming, the development cycle can be greatly shortened, providing a broader platform for the development of FPGA applications. Therefore, the application of accelerating services by using the field pro...

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Problems solved by technology

[0004] It can be seen from this that whether the data to be processed is transmitted from the host to the FPGA, or the data processing results are transmitted from the FPGA to the host, that is, the process of data exchange between the host and the FPGA needs to be read from the device memory of the FPGA itself. Data or write data, that is, the memory on the device side is used as the intermediary of data transmission between the host side and the FPGA, which has the problems of low data transmission efficiency and data exchange delay, which is not conducive to the fast and efficient feedback of data processing results to the host by the FPGA end

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